XR32330 Datasheet, PDF (9/13 Pages) Exar Corporation – 3-Driver/3-Receiver Intelligent RS-232 Transceiver

XR32330
Phase 2
V- transfer, see Figure 6 — Phase two of the clock con-
nects the negative terminal of C2 to the V- storage capaci-
tor and the positive terminal of C2 to GND. This transfers a
negative generated voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V. Simultaneous with
the transfer of the voltage to C3, the positive side of capac-
itor C1 is switched to V_CC and the negative side is con-
nected to GND.
VCC
C1
C2
-5.5V
C4
V+ Storage Capacitor
V- Storage Capacitor
C3
Figure 6: Charge Pump - Phase 2
Phase 3
V+ charge storage, see Figure 7 — The third phase of the
clock is identical to the first phase — the charge transferred
in C1 produces –V_CC in the negative terminal of C1, which
is applied to the negative side of capacitor C2. Since C2+ is
at V_CC, the voltage potential across C2 is 2 times V_CC.
VCC
C1
-VCC
+VCC
C2
-VCC
C4
V+ Storage Capacitor
V- Storage Capacitor
C3
connected to GND, allowing the charge pump cycle to begin
again. The charge pump cycle will continue as long as the
operational conditions for the internal oscillator are present.
VCC
+5.5V
C1
C2
C4
V+ Storage Capacitor
V- Storage Capacitor
C3
Figure 8: Charge Pump - Phase 4
Since both V+ and V– are separately generated from V_CC,
in a no–load condition V+ and V– will be symmetrical. Older
charge pump approaches that generate V– from V+ will
show a decrease in the magnitude of V– compared to V+
due to the inherent inefficiencies in the design. The clock
rate for the charge pump typically operates at greater than
250kHz. The external capacitors can be as low as 0.1μF
with a 16V breakdown voltage rating.
The Exar-patented charge pumps are designed to operate
reliably with a range of low cost capacitors. Either polarized
or non polarized capacitors may be used. If polarized
capacitors are used they should be oriented as shown in
the Typical Applications Circuit. The V+ capacitor may be
connected to either ground or V_CC (polarity reversed.)
The charge pump operates with 0.1μF capacitors for 3.3V
operation. For other supply voltages, see the table for
required capacitor values. Do not use values smaller than
those listed. Increasing the capacitor values (e.g., by dou-
bling in value) reduces ripple on the transmitter outputs and
may slightly reduce power consumption. C2, C3, and C4
can be increased without changing C1’s value.
Figure 7: Charge Pump - Phase 3
Phase 4
V+ transfer, see Figure 8 — The fourth phase of the clock
connects the negative terminal of C2 to GND, and transfers
this positive generated voltage across C2 to C4, the V+
storage capacitor. This voltage is regulated to +5.5V. At this
voltage, the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the positive side of
capacitor C1 is switched to V_CC and the negative side is
June 16, 2016
9 / 13
exar.com/XR32330
Rev 1B