XRT59L91 Datasheet, PDF (8/28 Pages) Exar Corporation – Single-Chip E1 Line Interface Unit

XRT59L91
Preliminary
SYSTEM DESCRIPTION
The XRT59L91 device is a single channel E1 trans-
ceiver that provides an electrical interface for
2.048Mbps applications. XRT59L91 includes a receive
circuit that converts an ITU-T G.703 compliant bipolar
signal into a TTL compatible logic levels. Each receiver
also includes an LOS (Loss of Signal) detection circuit.
Similarly, in the Transmit Direction, the Transmitter
converts TTL compatible logic levels into a G.703
compatible bipolar signal. The Transmitter may be
operated in either a “Clocked” or “Clockless” Mode.
The XRT59L91 device consists of both a Transmit
Section and a Receive Section; each of these sections
will be discussed in detail below.
1.0 The Transmit Section
In general, the purpose of the “Transmit Section”
(within the XRT59L91 device) is to accept TTL/CMOS
level digital data (from the Terminal Equipment), and to
encode it into a format such that it can:
1. Be efficiently transmitted over coaxial- or twisted-
pair cable at the E1 data rate; and
2. Be reliably received by the Remote Terminal
Equipment at the other end of the E1 data link.
3. Comply with the ITU-T G.703 pulse template
requirements, for E1 applications.
1.1 The Transmit Input Interface
The Transmit Input Interface accepts either “clocked” or
“clockless” data from the Terminal Equipment. The
manner in which the Terminal Equipment should apply
data to the XRT59L91 device depends upon whether the
device is being operated in the “clocked” or “clockless”
mode.
1.2.1 Operating the Transmitter in the Clocked
Mode
The user can configure the XRT59L91 device to operate
in the “Clocked” mode by simply applying a 2.048MHz
clock signal to the “TxClk” input pin. The XRT59L91
device contains detectioncircuitry that sense activity on
the “TxClk” line. If this circuit senses activity on the
“TxClk” line, then the XRT59L91 will automatically be
operating in the “Clocked” Mode.
In the Clocked Mode, a 2.048 mHz clock should be
applied toTxClk input pin and NRZ data at the TxPOS
and TxNEG input pins. The “Transmit Input Interface”
circuit will sample the data, at the TxPOS and TxNEG
input pins, upon the falling edge of TxClk, as illustrated
below.
The circuitry that the Transmit Section (within the
XRT59L91 device) uses to accomplish this goal is
discussed below. The Transmit Section of the
XRT59L91 device consists of the following blocks:
l Transmit Input Interface
l Pulse Shaping Block
Rev. P2.00
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