SP331 Datasheet, PDF(8/13 Page) Sipex Corporation – Programmable RS-232/RS-485 Transceiver

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SP331 Datasheet, PDF (8/13 Pages) Sipex Corporation – Programmable RS-232/RS-485 Transceiver

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Function Table for Select Pins

ABC D

0 1

0 1 1

MODE

RS-232

FUNCTION

All four RS-232 drivers active

All four RS-232 drivers tri-state

RS-232 (4ch) Loopback

0 1

0 1 1

0 1 1 1

RS-232/RS-485

T1 and T2 active RS-232; T3 tri-state RS-485

T1 and T2 tri-state RS-232; T3 active RS-485

T1 and T2 active RS-232; T3 tri-state RS-485

RS-232 (2ch) / RS-485 (1ch) Loopback

0 1

0 1 1

RS-485/RS-232

T1 active RS-485; T3 and T4 active RS-232

T1 tr-state RS-485; T3 active RS-232; T4 active RS232

All RS-485 and RS-232 drivers tri-state

RS-485 (1ch) / RS-232 (2ch) Loopback

1 1

0 1

1 1 1

1 1 1 1

RS-485

T1 and T3 active RS-485

T1 tri-state RS-485; T3 active RS-485

T1 active RS-485; T3 tri-state RS-485

RS-485 (2ch) Loopback

Table 1. Mode Function Table. (Refer to Control Logic Confirmations for Block Diagrams)

Theory of Operation

The SP331 is made up of four separate

circuit blocks â the charge pump, drivers,

receivers, and decoder. Each of these circuit

blocks is described in more detail below.

ChargeâPump

The charge pump is a Exarâpatented design

(U.S. 5,306,954) and uses a unique approach

compared to older less efficient designs.

The charge pump still requires four external

capacitors, but uses a fourâphase voltage

shifting technique to attain symmetrical 10V

power supplies. Figure 15(a) shows the

waveform found on the positive side of capci-

tor C2, and Figure 15(b) shows the negative

side of capcitor C2. There is a freeârunning

oscillator that controls the four phases of

the voltage shifting. A description of each

phase follows.

Phase 1

â VSS charge storage âDuring this phase of

the clock cycle, the positive side of capaci-

tColr+sisCt1haenndsCw2itcahreedintiotiagllryouchnadrgaendd

to +5V.

charge

transferred to C2â. Since C2+ is connected to

+5V, the voltage potential across capacitor

C2 is now 10V.

Phase 2

â VSS transfer â Phase two of the clock con-

nects the negative terminal of C2 to the VSS

storage capacitor and the positive terminal

of C2 to ground, and transfers the generated

âl0V to C3. Simultaneously, the positive side

of capacitor C 1 is switched to +5V and the

negative side is connected to ground.

Phase 3

â VDD charge storage â The third phase

of the clock is identical to the first phase

â the charge transferred in C1 produces

â5V in the negative terminal of C1, which

is applied to the negative side of capacitor

C2. Since C2+ is at +5V, the voltage potential

across C2 is l0V.

Phase 4

â VDD transfer â The fourth phase of the

clock connects the negative terminal of C2

Exar Corporation 48720 Kato Road, Fremont CA, 94538 â¢ 510-668-7017 â¢ www.exar.com

SP331_100_012610

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