SP211EH Datasheet, PDF (8/16 Pages) Exar Corporation – High Speed +5V High Performance

Charge–Pump
The charge pump is a Exar-patented design
(5,306,954) and uses a unique approach
compared to older less-efficient designs.
The charge pumps still requires four external
capacitors, but uses a four-phase voltage
shifting technique to attain symmetrical 10V
power supplies. Figure 3a shows the wave-
form found on the positive side of capacitor
C2, and Figure 3b shows the negative side
of capacitor C2. There is a free-running
oscillator that controls the four phases of
the voltage shifting. A description of each
phase is as follows:
+10V
a) C₂₊
GND
GND
b) C_2–
–10V
Figure 5. Typical waveforms seen on ca-
pacitor C2 when all drivers are at maximum
load.
Phase 1
— V_SS charge storage —During this phase of
the clock cycle, the positive side of capacitors
C₁ and C₂ are initially charged to +5V. C₁₊ is
then switched
transferred to
to ground and
C_2–. Since C₂₊
charge on C_1–
is connected
is
to
+5V, the voltage potential across capacitor
C₂ is now 10V.
Phase 2
— V_SS transfer — Phase two of the clock con-
nects the negative terminal of C₂ to the V_SS
storage capacitor and the positive terminal
of C₂ to ground, and transfers the generated
–l0V to C₃. Simultaneously, the positive side
of capacitor C ₁ is switched to +5V and the
negative side is connected to ground.
–5V in the negative terminal of C₁, which
is applied to the negative side of capacitor
C₂. Since C₂₊ is at +5V, the voltage potential
across C₂ is l0V.
Phase 4
— V_DD transfer — The fourth phase of the
clock connects the negative terminal of C₂
to ground and transfers the generated l0V
across C₂ to C₄, the V_DD storage capacitor.
Again, simultaneously with this, the positive
side of capacitor C₁ is switched to +5V and
the negative side is connected to ground,
and the cycle begins again.
Since both V+ and V^– are separately gen-
erated
and V^–
from
will
V_CC in a no–load
be symmetrical.
condition, V+
Older charge
pump approaches that generate V^– from
V+ will show a decrease in the magnitude
of V^– compared to V+ due to the inherent
inefficiencies in the design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors
must be a minimum of 0.1µF with a 16V
breakdown rating.
Phase 3
— V_DD charge storage — The third phase
of the clock is identical to the first phase
— the charge transferred in C₁ produces
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com

SP211EH_213EH_101_060111