XRD64L43 Datasheet, PDF (7/20 Pages) Exar Corporation – Dual 10-Bit 40MSPS CMOS ADC

Preliminary
XRD64L43
ELECTRICAL CHARACTERISTICS TABLE (CONT'D)
Test Conditions (Unless Otherwise Specified)
T_A = 25°C AV_DD = DV_DD = +3.0V, VIN = GND to +2.5V, V_RLF = GND, V_RHF = +2.5V and Fs = 40MSPS, 50% Duty
Cycle, Differential Input Mode
Symbol Parameter
Min. Typ.
Max.
DYNAMIC PERFORMANCE Fs = 40MHz
SNR
Signal-to-Noise Ratio
fin = 1.0 MHz
58
60
fin = 4.0 MHz
57
60
fin = 10.0 MHz
57
59
SINAD
Signal-to Noise and
Distortion
fin = 1.0 MHz
58
60
fin = 4.0 MHz
57
59
fin = 10 MHz
56
58
ENOB EFFECTIVE NUMBER OF BITS
fin = 1.0 MHz
9.3
9.7
fin = 4.0 MHz
9.2
9.5
fin = 10 MHz
9.0
9.2
SFDR SPURIOUS FREE DYNAMIC RANGE
SFDR
fin = 1.0 MHz
70
Crosstalk fin = 1.0 MHz
75
IMD
fin1 = 2.5 MHz
70
fin2 = 3.5 MHz
CONVERSION AND TIMING CHARACTERISTICS (CL = 10pF)
MAXCON Maximum Conversion
40
50
MINCON Minimum Conversion
100
Lat
Latency
17
APJT
tr
tf
tpd
Aperture Jitter Time
Digital Output Rise Time
Digital Output Fall Time
Output Data Propagation
12
3
3
6
25
tden
Delay
Output Data Enable
6
20
Delay
tdis
Output Data Disable
5
20
Delay
CLKDC Clock Duty Cycle
40
50
60
Unit Conditions
Not Including Harmonics
dB
dB
dB
Including Harmonics
dB
dB
dB
Bit
Bit
Bit
dB
dB
dB
Intermodulation Distortion
MSPS
KSPS
cycles
ps
ns
ns
ns
Guaranteed by Design
Peak-to Peak
ns
Guaranteed by Design
ns
Guaranteed by Design
%
Guaranteed by Design
Rev. P1.00
7