XRT83VSH316_07 Datasheet, PDF (60/97 Pages) Exar Corporation – 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT

XRT83VSH316
16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
FIGURE 41. INTEL µP INTERFACE SIGNALS DURING PROGRAMMED I/O READ AND WRITE OPERATIONS WITH
ALE=HIGH
ALE = 1
ADDR[9:0]
CS
DATA[7:0]
RD
WR
RDY
t₀
t₁
READ OPERATION
t₀
Valid Address
Valid Data for Readback
t₃
t₂
WRITE OPERATION
Valid Address
Data Available to Write Into the LIU
t₄
TABLE 20: INTEL MICROPROCESSOR INTERFACE TIMING SPECIFICATIONS
SYMBOL
PARAMETER
MIN
MAX
t₀
Valid Address to CS Falling Edge
t₁
CS Falling Edge to RD Assert
t₂
RD Assert to RDY Assert
NA
RD Pulse Width (t₂)
t₃
CS Falling Edge to WR Assert
t₄
WR Assert to RDY Assert
NA
WR Pulse Width (t₄)
0
-
65
-
-
90
90
-
65
-
-
90
90
-
UNITS
ns
ns
ns
ns
ns
ns
ns
57