XRT8020 Datasheet, PDF (6/12 Pages) Exar Corporation – 650 MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS

XRT8020
REV. 1.0.2
650 MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
FIGURE 3. LVDS OUTPUT WAVEFORMS AND TEST CIRCUITS
LDVS Levels Test Circuit
OUTP
50Ω
V_OUT
V_CM
50Ω
OUTN
LDVS Switching Test Circuit
OUTP
C_L = 5 pF
C_L = 5 pF
OUTN
V_OUT
R_L = 100Ω
LDVS Transition Time Waveform
OUTP
OUTN
50%
VCM (Differential)
t_skew
50%
80%
80%
VOUT
0V
20%
T_R
0V (Differential)
20%
T_F
TABLE 1: FREQUENCY SELECTION TABLE
FS0
PIN 10
FS1
PIN 9
CRYSTAL OR CLOCK
FREQUENCY
INTERNAL
CAPACITOR
MULTIPLY
RATIO
OUTPUT
DIVIDE
1
1
78.0 MHz Clock
NA
8x
1
0
1
39.0 MHz
12 pF
16x
1
1
0
19.5 MHz
20 pF
32x
1
0
0
19.5 MHz
20 pF
32x
2
NOTES:
1. Use Parallel Fundamental mode crystal
2. FS0 has an internal 50KΩ pull-up resistor to VDD
3. FS1 has an internal 50KΩ pull-down resistor to GND
OUTPUT
FREQUENCY
624 MHz
624 MHz
624 MHz
312 MHz
TABLE 2: POWER-DOWN AND OUTPUT TRI-STATE SELECTION TABLE
PD OE
PIN 8 PIN 7
STATUS
1
X Outputs tri-stated and chip Powered-down
0
1 Output tri-stated
NOTES:
1. “X" = Don't care
2. PD and OE have an internal 50KΩ pull-down resis-
tor to ground.
1.0 CALIBRATION
5