XRD87L75 Datasheet, PDF (6/15 Pages) Exar Corporation – Low-Voltage CMOS 8-Bit High-Speed Analog-to-Digital Converter

XRD87L75
APPLICATION NOTES
Signals should not exceed AV_DD +0.5V or go below
AGND -0.5V or DV_DD +0.5V or DGND -0.5V. All pins
have internal protection diodes that will protect them
from short transients (<100µs) outside the supply
range.
AGND and DGND pins are connected internally through
the P- substrate. DC voltage differences between these
pins will cause undesirable internal substrate currents.
The power supply (AV_DD) and reference voltage (V_RT &
V_RB) pins should be decoupled with 0.1µF and 10µF
capacitors to AGND, placed as close to the chip as
possible.
The digital outputs should not drive long wires or buses.
The capacitive coupling and reflections will contribute
noise to the conversion.
To avoid timing errors, use the rising edge of the sample
clock (CLK) to latch data from the XRD87L75 to other
parts of the system.
The reference can be biased internally by shorting V_RT
to V_RTS and V_RB to V_RBS. This will generate 0.4V at V_RB
and 1.72V at V_RT (see Figure 5.).
If the internal reference pins V_RTS and/or V_RBS are not
used they should be left unconnected.
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
0
Vdd = 3.3V
Vrt = 2.5V
Vrb = 0.5V
Fs = 6MHz
Ta = 25^oC
32
64
96
128
160
192
224
256
Code
Graph 1. DNL vs. Code
Rev. 1.00
6