SP6683 Datasheet, PDF(6/14 Page) Sipex Corporation – High Power LED Driver for Parallel Configuration

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

SP6683 Datasheet, PDF (6/14 Pages) Sipex Corporation – High Power LED Driver for Parallel Configuration

◁

General Overview

The SP6683 is a current regulated charge pump

ideal for converting a Li-Ion battery input for

driving white LEDs used in camera flash or

backlighting color displays in cellular phones,

PDAs, digital cameras and MP3 players. The

SP6683 is able to efficiently drive one 200mA

Flash LED or up to eight 20mA white LEDs in

parallel and maintain a constant brightness over

a very wide operating voltage range (2.7V to

5.5V). The SP6683 operates with an internal

1.2MHz clock, enabling the use of small exter-

nal components. Other features of SP6683 in-

clude PWM dimming control as well as com-

plete input/output disconnect in shutdown. In

shutdown mode the IC typically draws 500nA

current. The output regulation is achieved by

sensing the voltage at the feedback pin and

modulating the switch between the charge pump

and output capacitor.

Theory of Operation

The SP6683 regulated charge pump block dia-

gram consists of four main blocks (Voltage

Reference, Mode Control, Clock Manager, Start-

up and Charge-Pump Switches) and two com-

parators (VMODE Comparator and VOUT Com-

parator).

THEORY OF OPERATION

1) Voltage Reference. This block provides the

315mV and 1.25V reference voltages needed

for the two comparators.

2) Mode Control. An external voltage divider

connected to the VMODE pin will define an input

voltage to the mode comparator which sets the

logic state of the mode selection outputs to the

X1 or X1.5 modes. VMODE is compared to a

1.25V bandgap voltage. For example, if one

makes a 158K/100K divider, the mode will

change at 2.58 x 1.25 V = 3.23V. A comparator-

based cycle by cycle regulation ensures that no

mode change occurs during cycles.

3) Clock Manager. An internal 1.2MHz clock

is generated in this block. Depending on the

mode control, the appropriate clock phasing is

generated here and sent to the startup and charge

pump switches block.

4) VOUT Comparator & Output Control. A

315mV reference voltage is compared to feed-

back voltage to control the VOUT needed for the

application. Output current is set by a bias

resistor from the FB pin to the GND pin chosen

by the relationship:

IOUT

VFB

RFB

where VFB = 315mV.

Date: 3/31/06 RevG

SP6683 1X/1.5X Charge Pump LED Driver for Flash or Backlight

▷