SP213EHCA Datasheet, PDF (6/19 Pages) Exar Corporation – Low Power, High ESD +5V RS-232 Transceivers

Receiver input thresholds are between 1.2
to 1.7 volts typical. This allows the receiver
to detect standard TTL or CMOS logic-level
signals as well as RS-232 signals. If a re-
ceiver input is left unconnected or un-driven,
a 5kΩ pulldown resistor to ground will commit
the receiver to a logic-1 output state.
Highly Efficient Charge–Pump
The onboard dual-output charge pump is
used to generate positive and negative signal
voltages for the RS-232 drivers. This enables
fully compliant RS-232 and V.28 signals from
a single power supply device.
The charge pumps use four external capaci-
tors to hold and transfer electrical charge.
The Exar–patented design (US Patent
#5,306,954) uses a unique approach com-
pared to older, less–efficient designs.The
pumps use a four–phase voltage shifting
technique to attain symmetrical V+ and V-
power supplies. An intelligent control oscil-
lator regulates the operation of the charge
pump to maintain the proper voltages at
maximum efficiency.
Phase 1
V_SS charge store and double — The positive
terminals of capacitors C₁ and C₂ are charged
from V_CC with their negative terminals initially
connected to ground. C_l+ is then
to ground and the stored charge
superimposed onto C₂^–. Since
connected
from C₁^– is
C₂+ is still
connected to V_CC the voltage potential across
capacitor C₂ is now 2 x V_CC.
Phase 2
— V_SS transfer and invert — Phase two con-
nects the negative terminal of C₂ to the V_SS
storage capacitor and the positive terminal
oanf Cd _{i2ntvoegrtreodu(nVd-.)}
This transfers the doubled
voltage onto C₃. Meanwhile,
capacitor C₁ charged from V_CC to prepare it
for its next phase.
V_CC = +5V
+
C_{1 –}
+
C_{2 –}
–10V
C₄
+ – _{VDD Storage Capacitor}
– + _{VSS Storage Capacitor}
C₃
Figure 2. Charge Pump — Phase 2
Phase 3
V_DD charge store and double —Phase three
is identical to the first phase.The positive
terminals of capacitors C₁ and C₂ are charged
from V_CC with their negative terminals initially
connected to ground. C_l+ is then
to ground and the stored charge
superimposed onto C₂^–. Since
connected
from C₁^– is
C₂+ is still
connected to V_CC the voltage potential across
capacito_Vr_CCC_{= 2+5}i_Vs now 2 x V_CC.
+
C_{1 –}
–5V
+5V
+
C_{2 –}
–5V
C₄
+ – _{VDD Storage Capacitor}
– + _{VSS Storage Capacitor}
C₃
Figure 3. Charge Pump — Phase 3
V_CC = +5V
+
C_{1 –}
–5V
+5V
+
C_{2 –}
–5V
C₄
+ – _{VDD Storage Capacitor}
– + _{VSS Storage Capacitor}
C₃
Figure 1. Charge Pump — Phase 1
Phase 4
V_DD transfer — The fourth phase connects
the negative terminal of C₂ to ground and
the positive terminal of C₂ to the V_DD stor-
age capacitor. This transfers the doubled
(V+) voltage onto C₄. Meanwhile, capacitor
C₁ is charged from V_CC to prepare it for its
next phase.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com

SP207E_100_072309