XR16V564 Datasheet, PDF (54/55 Pages) Exar Corporation – 2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO

XR16V564/564D
2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO
TABLE OF CONTENTS
REV. 1.0.1
GENERAL DESCRIPTION ................................................................................................ 1
FEATURES .................................................................................................................................................... 1
APPLICATIONS............................................................................................................................................... 1
FIGURE 1. XR16V564 BLOCK DIAGRAM ........................................................................................................................................... 1
FIGURE 2. PIN OUT ASSIGNMENT FOR 68-PIN PLCC PACKAGES IN 16 AND 68 MODE AND 64-PIN LQFP PACKAGES.......................... 2
FIGURE 3. PIN OUT ASSIGNMENT FOR 48-PIN QFN PACKAGE AND 80-PIN LQFP PACKAGE............................................................... 3
PIN DESCRIPTIONS ........................................................................................................ 4
ORDERING INFORMATION................................................................................................................................ 4
1.0 PRODUCT DESCRIPTION....................................................................................................................... 9
2.0 FUNCTIONAL DESCRIPTIONS............................................................................................................. 10
2.1 CPU INTERFACE............................................................................................................................................... 10
FIGURE 4. XR16V564 TYPICAL INTEL/MOTOROLA DATA BUS INTERCONNECTIONS........................................................................... 10
2.2 DEVICE RESET ................................................................................................................................................. 11
2.3 CHANNEL SELECTION..................................................................................................................................... 11
TABLE 1: CHANNEL A-D SELECT IN 16 MODE ................................................................................................................................. 11
TABLE 2: CHANNEL A-D SELECT IN 68 MODE ................................................................................................................................. 11
2.4 CHANNELS A-D INTERNAL REGISTERS ....................................................................................................... 12
2.5 INT OUPUTS FOR CHANNELS A-D ................................................................................................................. 12
TABLE 3: INT PIN OPERATION FOR TRANSMITTER FOR CHANNELS A-D ........................................................................................... 12
TABLE 4: INT PIN OPERATION FOR RECEIVER FOR CHANNELS A-D ................................................................................................. 12
2.6 DMA MODE........................................................................................................................................................ 12
TABLE 5: TXRDY# AND RXRDY# OUTPUTS IN FIFO AND DMA MODE FOR CHANNELS A-D ........................................................... 13
2.7 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT .............................................................................. 13
FIGURE 5. TYPICAL CRYSTAL CONNECTIONS................................................................................................................................... 13
2.8 PROGRAMMABLE BAUD RATE GENERATOR WITH FRACTIONAL DIVISOR............................................ 13
FIGURE 6. BAUD RATE GENERATOR ............................................................................................................................................... 14
TABLE 6: TYPICAL DATA RATES WITH A 24 MHZ CRYSTAL OR EXTERNAL CLOCK AT 16X SAMPLING ................................................... 15
2.9 TRANSMITTER .................................................................................................................................................. 15
2.9.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ........................................................................................... 15
2.9.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................... 16
FIGURE 7. TRANSMITTER OPERATION IN NON-FIFO MODE .............................................................................................................. 16
2.9.3 TRANSMITTER OPERATION IN FIFO MODE ............................................................................................................. 16
FIGURE 8. TRANSMITTER OPERATION IN FIFO AND FLOW CONTROL MODE ..................................................................................... 16
2.10 RECEIVER ....................................................................................................................................................... 17
2.10.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 17
FIGURE 9. RECEIVER OPERATION IN NON-FIFO MODE .................................................................................................................... 17
FIGURE 10. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE ....................................................................... 18
2.11 AUTO RTS (HARDWARE) FLOW CONTROL ................................................................................................ 18
2.12 AUTO RTS HYSTERESIS................................................................................................................................ 18
TABLE 7: AUTO RTS (HARDWARE) FLOW CONTROL ........................................................................................................................ 18
2.13 AUTO CTS FLOW CONTROL ......................................................................................................................... 19
FIGURE 11. AUTO RTS AND CTS FLOW CONTROL OPERATION....................................................................................................... 19
2.14 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL...................................................................................... 20
TABLE 8: AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ............................................................................................................... 20
2.15 SPECIAL CHARACTER DETECT .................................................................................................................. 20
2.16 INFRARED MODE ........................................................................................................................................... 21
FIGURE 12. INFRARED TRANSMIT DATA ENCODING AND RECEIVE DATA DECODING .......................................................................... 21
2.17 SLEEP MODE WITH AUTO WAKE-UP........................................................................................................... 22
2.18 INTERNAL LOOPBACK ................................................................................................................................. 22
FIGURE 13. INTERNAL LOOP BACK IN CHANNEL A AND B ................................................................................................................ 23
3.0 UART INTERNAL REGISTERS ............................................................................................................. 24
TABLE 9: UART CHANNEL A AND B UART INTERNAL REGISTERS ...................................................................................... 24
TABLE 10: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1 ....................................... 25
4.0 INTERNAL REGISTER DESCRIPTIONS............................................................................................... 26
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY .................................................................................. 26
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................... 26
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE................................................................................. 26
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................... 26
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION .................................................................. 27
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