XRP6275 Datasheet, PDF (4/11 Pages) Exar Corporation – 3A Ultra Low Dropout Voltage Regulator

PIN ASSIGNMENT
XRP6275
3A Ultra Low Dropout Voltage Regulator
XRP6275
DFN-10
3mm x 3mm DFN-10
Fig. 3: XRP6275 Pin Assignment
PIN DESCRIPTION
Name
PIN #
EN
2
VIN
3, 4
PGOOD
1
VOUT
7, 8
ADJ
9
PGND
5, 6
Ther. Pad
---
AGND
10
Description
Enable Input Pin. This is a high impedance MOS input with CMOS logic level
compatibility. Logic high enables the device; logic low disables the device. EN
must be asserted high after VIN reaches its minimum operating range. For
automatic startup EN must be sequenced with respect to VIN as shown in
application circuit. Do not pull this pin higher than VIN+0.5V.
Power Input Pin. Must be closely decoupled to PGND pin with a 4.7µF or greater
ceramic capacitor.
Power Good open Drain Output. When used it should be pulled up to VIN with a
resistor. Typical resistor value 100k.
Regulator Output pin. Must be closely decoupled to PGND pin with a 4.7µF or
greater ceramic capacitor.
Adjustable Pin.
Connect to a resistive voltage divider to set the output voltage of the device.
Power Ground
Connect to PGND.
Signal ground. Connect with a separate trace to the ground of the output being
regulated.
ORDERING INFORMATION
Part Number
XRP6275EH-F
XRP6275EHMTR-F
XRP6275EHTR-F
XRP6275EVB
Junction
Temperature
Range
Marking
-40°C≤TJ≤+125°C
6275E
YYWW
XXXXX
XRP6275 Evaluation board
Package
Packing
Quantity
Note 1
Note 2
10-pin DFN
Bulk
250/Tape & Reel
Halogen Free
3Amp
Adjustable
3K/Tape & Reel
“YY” = Year – “WW” = Work Week – “X” = Lot Number when applicable.
© 2015 Exar Corporation
4/11
Rev. 2.0.0