XR71211 Datasheet, PDF (4/12 Pages) Exar Corporation – 1.5A Ultra Low Dropout Voltage Regulator

Pin Configuration
PGOOD 1
EN 2
VIN 3
VIN 4
PGND 5
XR71211
DFN-10
Thermal Pad
10 AGND
9 ADJ
8 VOUT
7 VOUT
6 PGND
XR71211
Pin Assignments
Pin No.
Pin Name
1
PGOOD
2
EN
3, 4
VIN
5, 6
PGND
7, 8
VOUT
9
ADJ
10
AGND
Thermal Pad
Type
OD
I
PWR
PWR
O
I
PWR
PWR
Description
Power Good open-drain output. When used it should be pulled up to VIN with a resistor. Typi-
cal resistor value is 100kΩ.
Enable Input Pin. This is a high impedance MOS input with CMOS logic level compatibility.
Logic high enables the device; logic low disables the device. EN must be asserted high after
VIN reaches its minimum operating range. For automatic startup EN must be sequenced with
respect to VIN as shown in application circuit. Do not pull this pin higher than VIN + 0.5V.
Power Input Pin. Must be closely decoupled to PGND pin with a 4.7μF or greater ceramic
capacitor.
Power Ground
Regulator Output pin. Must be closely decoupled to PGND with a 4.7μF or greater ceramic
capacitor.
Adjustable Pin. Connect to a resistive voltage divider to set the output voltage of the device.
Signal ground. Connect with a separate trace to the ground of the output being regulated.
Connect to PGND.
Type: I = Input, O = Output, I/O = Input/Output, PWR = Power, OD = Open-Drain
© 2014 Exar Corporation
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exar.com/XR71211
Rev 1B