ST16C654IJ68-F Datasheet, PDF (4/51 Pages) Exar Corporation – 2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO

ST16C654/654D
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
xr
REV. 5.0.2
PIN DESCRIPTIONS
Pin Description
NAME
64-LQFP
PIN #
68-PLCC
PIN#
100-QFP
PIN #
TYPE
DESCRIPTION
DATA BUS INTERFACE
A2
22
32
37
I Address data lines [2:0]. These 3 address lines select one of the
A1
23
33
38
A0
24
34
39
internal registers in UART channel A-D during a data bus transac-
tion.
D7
60
5
95
I/O Data bus lines [7:0] (bidirectional).
D6
59
4
94
D5
58
3
93
D4
57
2
92
D3
56
1
91
D2
55
68
90
D1
54
67
89
D0
53
66
88
IOR#
40
52
66
I When 16/68# pin is at logic 1, the Intel bus interface is selected and
(VCC)
this input becomes read strobe (active low). The falling edge insti-
gates an internal read cycle and retrieves the data byte from an
internal register pointed by the address lines [A2:A0], puts the data
byte on the data bus to allow the host processor to read it on the ris-
ing edge.
When 16/68# pin is at logic 0, the Motorola bus interface is selected
and this input is not used and should be connected to VCC.
IOW#
9
(R/W#)
18
15
I When 16/68# pin is at logic 1, it selects Intel bus interface and this
input becomes write strobe (active low). The falling edge instigates
the internal write cycle and the rising edge transfers the data byte on
the data bus to an internal register pointed by the address lines.
When 16/68# pin is at logic 0, the Motorola bus interface is selected
and this input becomes read (logic 1) and write (logic 0) signal.
CSA#
7
(CS#)
16
13
I When 16/68# pin is at logic 1, this input is chip select A (active low)
to enable channel A in the device.
When 16/68# pin is at logic 0, this input becomes the chip select
(active low) for the Motorola bus interface.
CSB#
11
20
17
I When 16/68# pin is at logic 1, this input is chip select B (active low)
(A3)
to enable channel B in the device.
When 16/68# pin is at logic 0, this input becomes address line A3
which is used for channel selection in the Motorola bus interface.
CSC#
38
50
64
I When 16/68# pin is at logic 1, this input is chip select C (active low)
(A4)
to enable channel C in the device.
When 16/68# pin is at logic 0, this input becomes address line A4
which is used for channel selection in the Motorola bus interface.
CSD#
42
54
68
I When 16/68# pin is at logic 1, this input is chip select D (active low)
(VCC)
to enable channel D in the device.
When 16/68# pin is at logic 0, this input is not used and should be
connected VCC.
4