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XR68C681 Datasheet, PDF (38/75 Pages) Exar Corporation – CMOS Dual Channel UART (DUART)
XR68C681
Bits 7 - 4: “Change in Logic State” Identification Bits
 % (+( $%  H %    $I  $  '  $ & H  - +    '%I  % H  - + 
  '%I  ($ $ + (  ( % #,  - #,1 #+  % H  - +    '%I $  '  '  - ( -('
% (  & +  % + (  ( %"   & ( ($ (+&  H--( -I (  & % ( -  ' % $( - H I (+( $
( (  #,  HI #+  H  - +    '%I $  $  '  '  - + % "   (' ( "   &
(  + '  (% & 3 ( -  ' % $( - (+( $% %   HI
#   $%" (+ (  ( #,1 ! ( ' %  '  - ( -(' % "  ( @ ( ' (  -(' HI
Bits 3 - 0: “The Current State of Input Pins IP0 - IP3”
 % (+( $%  H $  &I  $  + '  '  -(' %   #,  - #,1 (  ( %
# $     H#  ,   - +  I (  "  % $  +( -
 A(  ( $     ( +   ( +% +  (%  %  $   , % 
   (' (%" ( (    -(% "  % $ $
    ( +  #, ( ( $('  (' +  + ( % ( % ! ( ' $  '  - + %  
  ( +  #,  % %   %  % +  % ( %   + "   $( -  #," (  
% %   H  - +  I (  "  , ( $  ( 4
  (  ( %   -- $
  +(  % +  '  -( - (  (
  ( - # M@N
Bit 7
BRG Set
Select
 J   
 J   
Bit 6
Bit 5
Bit 4
Counter/Timer Mode and Source
 Table 7
Bit3
Delta IP3
Interrupt
J
 J 8
Bit 2
Delta IP2
Interrupt
J
 J 8
Bit 1
Delta IP1
Interrupt
J
 J 8
Bit 0
Delta IP0
Interrupt
J
 J 8
Table 14. ACR- Auxiliary Control Register
Note:
This “two-tiered” interrupt enabling/disabling approach, for the “Input Change of State” interrupt allows tremendous flexibility for the
user. Setting or clearing the bits in ACR[3:0] allows the user to specify exactly which Input Port pins to be enabled (or disabled) for
generating the “Input Port Change of State” interrupt. Setting or clearing IMR[7] allows the user to “globally” enable or disable this
interrupt.
  
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