XRA1405 Datasheet, PDF (3/16 Pages) Exar Corporation – 16-BIT SPI GPIO EXPANDER WITH INTEGRATED LEVEL SHIFTERS

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PIN DESCRIPTIONS
XRA1405
16-BIT SPI GPIO EXPANDER WITH INTEGRATED LEVEL SHIFTERS
Pin Description
NAME
QFN-24 TSSOP-24
TYPE
PIN#
PIN#
DESCRIPTION
SPI INTERFACE
SO
20
SCL
19
IRQ#
22
CS#
18
SI
24
23
O _{SPI serial data output.}
22
I _{SPI bus serial input clock.}
1
OD _{Interrupt output (open-drain, active LOW).}
16
I _{SPI bus chip select.}
3
I _{SPI serial data input.}
GPIOs
P0
1
4
P1
2
5
P2
3
6
P3
4
7
P4
5
8
P5
6
9
P6
7
10
P7
8
11
P8
10
13
P9
11
14
P10
12
15
P11
13
16
P12
14
17
P13
15
18
P14
16
19
P15
17
20
ANCILLARY SIGNALS
VCCP
21
24
VCC
23
2
GND
9
12
GND Center
-
Pad
I/O _{General purpose I/Os P0-P7. All GPIOs are configured as inputs upon power-}
I/O up or after a reset.
I/O
I/O
I/O
I/O
I/O
I/O
I/O _{General purpose I/O P8-P15. All GPIOs are configured as inputs upon power-}
I/O up or after a reset.
I/O
I/O
I/O
I/O
I/O
I/O
1.65V to 3.6V VCC supply voltage for GPIOs.
Pwr _{1.65V to 3.6V VCC supply voltage for SPI bus interface.}
Pwr _{Power supply common, ground.}
Pwr _{The exposed pad at the bottom surface of the package is designed for thermal}
performance. Use of a center pad on the PCB is strongly recommended for ther-
mal conductivity as well as to provide mechanical stability of the package on the
PCB. The center pad is recommended to be solder masked defined with open-
ing size less than or equal to the exposed thermal pad on the package bottom to
prevent solder bridging to the outer leads of the device. Thermal vias must be
connected to GND plane as the thermal pad of package is at GND potential.
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
3