XRA1201 Datasheet, PDF (3/17 Pages) Exar Corporation – 16-BIT I2C/SMBUS GPIO EXPANDER

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PIN DESCRIPTIONS
XRA1201/1201P
16-BIT I2C/SMBUS GPIO EXPANDER
Pin Description
NAME
QFN-24 TSSOP-24
TYPE
PIN#
PIN#
DESCRIPTION
I²C INTERFACE
SDA
20
23
SCL
19
22
IRQ#
22
1
A0
18
21
A1
23
2
A2
24
3
GPIOs
P0
1
4
P1
2
5
P2
3
6
P3
4
7
P4
5
8
P5
6
9
P6
7
10
P7
8
11
P8
10
13
P9
11
14
P10
12
15
P11
13
16
P12
14
17
P13
15
18
P14
16
19
P15
17
20
ANCILLARY SIGNALS
VCC
21
24
GND
9
12
GND Center
-
Pad
I/O _I2_{C-bus data input/output (open-drain).}
I _I2_{C-bus serial input clock.}
OD _{Interrupt output (open-drain, active LOW).}
I _{These pins select the I}2_{C slave address. See Table 1.}
I
I
I/O _{General purpose I/Os P0-P7. All GPIOs are configured as inputs upon power-}
I/O up or after a reset. After power-up or reset, the internal pull-up resistors are
I/O ^{enabled for the XRA1201P. The internal pull-up resistors are disabled for the}
I/O ^XRA1201.
I/O
I/O
I/O
I/O
I/O _{General purpose I/O P8-P15. All GPIOs are configured as inputs upon power-}
I/O up or after a reset. After power-up or reset, the internal pull-up resistors are
I/O ^{enabled for the XRA1201P. The internal pull-up resistors are disabled for the}
I/O ^XRA1201.
I/O
I/O
I/O
I/O
Pwr _{1.65V to 3.6V VCC supply voltage.}
Pwr _{Power supply common, ground.}
Pwr _{The exposed pad at the bottom surface of the package is designed for thermal}
performance. Use of a center pad on the PCB is strongly recommended for ther-
mal conductivity as well as to provide mechanical stability of the package on the
PCB. The center pad is recommended to be solder masked defined with open-
ing size less than or equal to the exposed thermal pad on the package bottom to
prevent solder bridging to the outer leads of the device. Thermal vias must be
connected to GND plane as the thermal pad of package is at GND potential.
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
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