XR16C2450 Datasheet, PDF (3/31 Pages) Exar Corporation – 2.97V TO 5.5V DUART

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REV. 1.0.0
PIN DESCRIPTIONS
Pin Description
NAME
40-PDIP
PIN #
44-PLCC
PIN #
DATA BUS INTERFACE
A2
26
29
A1
27
30
A0
28
31
D7
8
9
D6
7
8
D5
6
7
D4
5
6
D3
4
5
D2
3
4
D1
2
3
D0
1
2
IOR#
21
24
48-TQFP
PIN #
26
27
28
3
2
1
48
47
46
45
44
19
IOW#
18
20
15
CSA#
14
16
10
CSB#
15
17
11
INTA
30
33
30
INTB
29
32
29
MODEM OR SERIAL I/O INTERFACE
TXA
11
13
7
RXA
10
11
5
XR16C2450
2.97V TO 5.5V DUART
TYPE
DESCRIPTION
I Address data lines [2:0]. These 3 address lines select one
of the internal registers in UART channel A/B during a
data bus transaction.
IO Data bus lines [7:0] (bidirectional).
I Input/Output Read Strobe (active low). The falling edge
instigates an internal read cycle and retrieves the data
byte from an internal register pointed to by the address
lines [A2:A0]. The data byte is placed on the data bus to
allow the host processor to read it on the rising edge.
I Input/Output Write Strobe (active low). The falling edge
instigates an internal write cycle and the rising edge
transfers the data byte on the data bus to an internal reg-
ister pointed by the address lines.
I UART channel A select (active low) to enable UART
channel A in the device for data bus operation.
I UART channel B select (active low) to enable UART
channel B in the device for data bus operation.
O UART channel A Interrupt output. The output state is
defined by the user and through the software setting of
MCR[3]. INTA is set to the active mode and OP2A# output
to a logic 0 when MCR[3] is set to a logic 1. INTA is set to
the three state mode and OP2A# to a logic 1 when
MCR[3] is set to a logic 0 (default).
O UART channel B Interrupt output. The output state is
defined by the user and through the software setting of
MCR[3]. INTB is set to the active mode and OP2B# out-
put to a logic 0 when MCR[3] is set to a logic 1. INTB is
set to the three state mode and OP2B# to a logic 1 when
MCR[3] is set to a logic 0 (default).
O UART channel A Transmit Data. If it is not used, leave it
unconnected.
I UART channel A Receive Data. Normal receive data input
must idle at logic 1 condition. If it is not used, tie it to VCC
or pull it high via a 100k ohm resistor.
3