XR17V258 Datasheet, PDF (25/70 Pages) Exar Corporation – 66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT

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REV. 1.0.0
XR17V258
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
1.6.8 REGB Register
REGB[16](Read/Write)
REGB[19:17]
REGB[20] (Write-Only)
REGB[21] (Write-Only)
REGB[22] (Write-Only)
REGB[23] (Read-Only)
Logic 0 (default) write to each UART configuration registers individually.
Logic 1 enables simultaneous write to all 8 UARTs configuration register.
Reserved
Control the EECK, clock, output (pin 116) on the EEPROM interface.
Control the EECS, chips select, output (pin 115) to the EEPROM device.
EEDI (pin 114) data input. Write data to the EEPROM device.
EEDO (pin 113) data output. Read data from the EEPROM device.
1.6.9 Multi-Purpose Inputs and Outputs
The V258 provides 8 multi-purpose inputs/outputs MPIO[7:0] for general use. Each pin can be programmed to
be an input or output function. The input logic state can be set for normal or inverted level, and optionally set to
generate an interrupt. The outputs can be set to be normal HIGH or LOW state, or 3-state. Their functions and
definitions are programmed through 5 registers: MPIOINT, MPIOLVL, MPIO3T, MPIOINV and MPIOSEL. If all
8 pins are set for inputs, all 8 interrupts would be ORed together. The ORed interrupt is reported in the channel
0 UART interrupt status, see Interrupt Status Register. The pins may also be programmed to be outputs and to
the 3-state condition for signal sharing. The MPIO[0] pin can be programmed to show the Timer output. When
it is programmed to be the Timer output, all the above 5 registers lose control over the MPIO[0] pin. For details
on Timer output, please see “Section 1.6.2, General Purpose 16-bit Timer/Counter [TIMERMSB,
TIMELSB, TIMER, TIMECNTL] (default 0xXX-XX-00-00)” on page 20.
1.6.10 MPIO REGISTERS
There are 5 registers that select, control and monitor the 8 multipurpose inputs and outputs. Figure 9 shows
the internal circuitry.
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