XRP7714 Datasheet, PDF (24/27 Pages) Exar Corporation – Quad Channel Digital PWM Step Down Controller

XRP7714
Quad Channel Digital PWM Step Down Controller
Irip is the inductor peak-to-peak current ripple (nominally set to 30% of Iout)
Keep in mind that a higher Irip results in a smaller inductance value which has the advantages of
smaller size, lower DC equivalent resistance (DCR), and allows the use of a lower output
capacitance to meet a given step load transient. A higher Irip, however, increases the output
voltage ripple, requires higher saturation current limit, and increases critical conduction. Notice
that this critical conduction current is half of Irip.
Capacitor Selection
• Output Capacitor Selection
Select the output capacitor for voltage rating, capacitance and Equivalent Series Resistance (ESR).
Nominally the voltage rating is selected to be at least twice as large as the output voltage. Select
the capacitance to satisfy the specification for output voltage overshoot/undershoot caused by the
current step load. A sudden decrease in the load current forces the energy surplus in the inductor
to be absorbed by Cout. This causes an overshoot in output voltage that is corrected by power
switch reduced duty cycle. Use the following equation to calculate Cout:
Where:
L is the output inductance
I2 is the step load high current
I1 is the step load low current
Vos is output voltage including the overshoot
Vout is the steady state output voltage
Or it can be expressed approximately by
2
∆
Here, ΔV = V_os − V_out is the overshoot voltage deviation.
Select ESR such that output voltage ripple (Vrip) specification is met. There are two components in
Vrip. First component arises from the charge transferred to and from Cout during each cycle. The
second component of Vrip is due to the inductor ripple current flowing through the output
capacitor’s ESR. It can be calculated for Vrip:
1
8
Where:
Irip is the inductor ripple current
fs is the switching frequency
Cout is the output capacitance
Note that a smaller inductor results in a higher Irip, therefore requiring a larger Cout and/or lower
ESR in order to meet Vrip. With the current generation of ultra-low ESR ceramic capacitors it is
common to operate with Irip ≥ 30% of Iout.
© 2010 Exar Corporation
24/27
Rev. 1.1.3