XRT4000 Datasheet, PDF (21/46 Pages) Exar Corporation – Universal Multiprotocol Serial Interface

XRT4000
Clock Inversion
Transmit Clock signal, TXC, has an inversion
option for both DTE and DCE modes of
operation. The user can invert the polarity of the
TXC by setting CKINV* to logic 0. In the DTE
mode, the incoming TXC signal from the line will
be inverted before it is routed to the system. In
DCE mode, the incoming TXC signal from the
system will be inverted before it is sent over the
line toward the remote DTE. This feature allows
a phase correction when there is a long cable
delay between the DTE and DCE. This
correction may be necessary in order to obtain
the desired clock-to-data phase relationship.
Data Inversion
Similar to TXC, there is a provision in the
XRT4000 to invert the TXD and RXD signals.
Once the Setting the DTINV* input to logic 0
enables an inverter at the output of RX1 and
input of TX1.
Registered Mode of Operation
The XRT4000 has integrated registers allowing
users the option of clocking the values of
DSR/DTR and RL/RI signals. This can be done
if the registered mode of operation is selected
(REG=1). In this case, the values of these
signals will be latched on the positive edge of
the REG_CLK signal. In the normal mode (REG
= 0), the registers on the path of the DSR/DTR
and RL/RI are bypassed and REG_CLK will
have no effect.
Similarly, the outputs of the receivers (RX5 and
RX8) can be disabled by setting the EN_OUT*
input high. This allows these drivers to be
connected directly to a microcontroller bus since
they can be enabled during read cycles and
disabled in other times.
This feature eliminates the need for external
registers when a microcontroller is used to
control (reading and writing) DSR/DTR and
RL/RI signals.
Loopbacks
XRT4000 contains internal logic to place the
interface in a loopback mode for test purposes.
The loopback feature is supported in both DTE
and DCE modes of operation and it can be
invoked by setting the LP* input at logic 0.
Possible loopback implementations are depicted
in the scenarios located at the end of this
document.
Rev. 1.00
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