XR21V1410_10 Datasheet, PDF (21/27 Pages) Exar Corporation – 1-CH FULL-SPEED USB UART

XR21V1410
REV. 1.1.0
1-CH FULL-SPEED USB UART
GPIO_MODE[3]: Transceiver Enable Polarity
• Logic 0 = GPIO5 Low for TX
• Logic 1 = GPIO5 High for TX
GPIO_MODE[7:4]: Reserved
These register bits are reserved. When writing to these bits, the value should be ’0’. When reading from these
bits, they are undefined and should be ignored.
3.3.12 GPIO_DIRECTION Register Description (Read/Write)
This register controls the direction of the GPIO if it is not controlled by the GPIO_MODE register.
GPIO_DIRECTION[5:0]: GPIOx Direction
• Logic 0 = GPIOx is an input.
• Logic 1 = GPIOx is an output.
GPIO_DIRECTION[7:6]: Reserved
These register bits are reserved and should be ’0’.
3.3.13 GPIO_INT_MASK Register Description (Read/Write)
Enables / disables generation of a USB interrupt packet at the change of state of GPIO pins when they are
configured as inputs.
GPIO_INT_MASK[5:0]: GPIOx Interrupt Mask
• Logic 0 = A change on this input causes the device to generate an interrupt packet.
• Logic 1 = A change on this input does not cause the device to generate an interrupt packet.
GPIO_INT_MASK[7:6]: Reserved
These register bits are reserved and should be ’0’.
3.3.14 GPIO_SET Register Description (Read/Write)
Writing a ’1’ in this register drives the GPIO output high. Writing a ’0’ to a bit has no effect. Bits 7-6 are unused
and should be ’0’.
3.3.15 GPIO_CLEAR Register Description (Read/Write)
Writing a ’1’ in this register drives the GPIO output low. Writing a ’0’ to a bit has no effect. Bits 7-6 are unused
and should be ’0’.
3.3.16 GPIO_STATUS Register Description (Read-Only)
This register reports the current state of the GPIO pin.
3.4 UART Custom Registers..
TABLE 15: UART CUSTOM REGISTERS
ADDRESS
REGISTER NAME
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3
0X03 WIDE_MODE
0
0
0
0
0
0x04 LOW_LATENCY
0
0
0
0
0
0x06 CUSTOM_INT_PACKET
0
GPIO5 GPIO4 GPIO3 GPIO0
BIT-2
0
0
0
BIT-1
0
0
GPIO2
BIT-0
EN
EN
GPIO1
21