XRT91L31_08 Datasheet, PDF (2/41 Pages) Exar Corporation – STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER

XRT91L31
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
REV. 1.0.2
FEATURES
• Targeted for SONET STS-12/STS-3 and SDH STM-4/STM-1 Applications
• Selectable full duplex operation between STS-12/STM-4 standard rate of 622.08 Mbps or STS-3/STM-1
155.52 Mbps
• Single-chip fully integrated solution containing parallel-to-serial converter, clock multiplier unit (CMU), serial-
to-parallel converter, clock data recovery (CDR) functions, and a SONET/SDH frame and byte boundary
detection circuit
• Ability to disable and bypass onchip CDR for external based received reference clock recovery thru
Differential LVPECL input pins XRXCLKIP/N
• 8-bit LVTTL parallel data bus paths running at 77.76 Mbps in STS-12/STM-4 or 19.44 Mbps in STS-3/STM-1
mode of operation
• Uses Differential LVPECL or Single-Ended LVTTL CMU reference clock frequencies of either 19.44 MHz or
77.76 MHz for both STS-12/STM-1 or STS-3/STM-1 operations
• Optional use of 77.76 MHz Single-Ended LVTTL input for independent CDR reference clock operation
• Able to Detect and Recover SONET/SDH frame boundary and byte align received data on the parallel bus
• Diagnostics features include LOS monitoring and automatic received data mute upon LOS
• Provides Local, Remote and Split Loop-Back modes as well as Loop Timing mode
• Optional flexibility to re-configure the transmit parallel bus clock output to a clock input and accept timing
signal from the framer/mapper device to permit the framer/mapper device time domain to be synchronized
with the transceiver transmit timing.
• Meets Telcordia, ANSI and ITU-T G.783 and G.825 SDH jitter requirements including T1.105.03 - 2002
SONET Jitter Tolerance specification, Bellcore TR-NWT-000253 and GR-253-CORE, GR-253 ILR SONET
Jitter specifications.
• Complies with ANSI/TIA/EIA-644 and IEEE P1596.3 3.3V LVDS standard, 3.3V LVPECL, and JESD 8-B
LVTTL and LVCMOS standard.
• Operates at 3.3V with 3.3V I/O
• Less than 660mW in STS-3/STM-1 mode or 800mW in STS-12/STM-4 mode Typical Power Dissipation
• Package: 10 x 10 x 2.0 mm 64-pin QFP
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