XRK32308_07 Datasheet, PDF (2/16 Pages) Exar Corporation – 3.3V ZERO DELAY BUFFER

XRK32308
3.3V ZERO DELAY BUFFER
PIN
SOIC/TSSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
QFN
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PRELIMINARY
TABLE 1: PIN DESCRIPTION
SIGNAL
DESCRIPTION
REF^[1]
QA0^[2]
QA1^[2]
V_DD
GND
QB0^[2]
QB1^[2]
S2^[3]
S1^[3]
QB2^[2]
QB3^[2]
GND
V_DD
QA2^[2]
QA3^[2]
FB
Input reference frequency
Clock output, Bank A
Clock output, Bank A
3.3V supply
Ground
Clock output, Bank B
Clock output, Bank B
Select input, bit 2
Select input, bit 1
Clock output, Bank B
Clock output, Bank B
Ground
3.3V supply
Clock output, Bank A
Clock output, Bank A
PLL feedback input
REV. P1.0.3
TABLE 2: SELECT INPUT DECODING
S2
S1
QA0-QA3
QB0-QB3
OUTPUT SOURCE
0
0
Three-State
Three-State
PLL
0
1
Driven
Three-State
PLL
1
0
Driven^[4]
Driven^[4]
Reference
1
1
Driven
Driven
PLL
NOTES:
1. Weak pull-down.
2. Weak pull-down on all outputs.
3. Weak pull-ups on these inputs.
4. Outputs inverted on XRK32308–2 and XRK32308–3 in bypass mode, S2 = 1 and S1 = 0.
2