XR16M698 Datasheet, PDF (18/58 Pages) Exar Corporation – 1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO

XR16M698
1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
REV. 1.0.0
2.11 Auto Xon/Xoff (Software) Flow Control
When software flow control is enabled (See Table 18), the 698 compares one or two sequential receive data
characters with the programmed Xon-1,2 or Xoff-1,2 character value(s). If receive character(s) (RX) match the
programmed Xoff-1,2 value(s), the 698 will halt transmission (TX) as soon as the current character has
completed transmission. When a match occurs, the Xoff (if enabled via IER bit-5) flag will be set and the
interrupt output pin will be activated. Following a suspension due to a match of the Xoff character(s), the 698
will monitor the receive data stream for a match to the Xon-1,2 character(s). If a match is found, the 698 will
resume operation and clear the flags (ISR bit-4).
Reset initially sets the contents of the Xon1, Xon2, Xoff1 and Xoff2 flow control registers to ’0’. Following reset,
any desired Xon/Xoff value can be used for software flow control. Different conditions can be set to detect Xon/
Xoff characters (See Table 18) and suspend/resume transmissions. When double 8-bit Xon/Xoff characters
are selected, the 698 compares two consecutive receive characters with two software flow control 8-bit values
(Xon1, Xon2, Xoff1, Xoff2) and controls TX transmissions accordingly. Under the above described flow control
mechanisms, flow control characters are not placed (stacked) in the user accessible RX data buffer or FIFO.
In the event that the receive buffer is overfilling and flow control needs to be executed, the 698 automatically
sends an Xoff message (when enabled) via the serial TX output to the remote modem. The 698 sends the Xoff-
1,2 characters two character times (= time taken to send two characters at the programmed baud rate) after
the receive FIFO crosses the programmed trigger level. To clear this condition, the 698 will transmit the
programmed Xon-1,2 characters as soon as receive FIFO is less than one trigger level below the programmed
trigger level. Table 7 below explains this.
TABLE 7: AUTO XON/XOFF (SOFTWARE) FLOW CONTROL
RX TRIGGER LEVEL INT PIN ACTIVATION
8
8
16
16
24
24
28
28
XOFF CHARACTER(S) SENT
(CHARACTERS IN RX FIFO)
8*
16*
24*
28*
XON CHARACTER(S) SENT
(CHARACTERS IN RX FIFO)
0
8
16
24
* After the trigger level is reached, an xoff character is sent after a short span of time (= time required to send 2 characters);
for example, after 2.083ms has elapsed for 9600 baud and 10-bit word length setting.
2.12 Special Character Detect
A special character detect feature is provided to detect an 8-bit character when bit-5 is set in the Enhanced
Feature Register (EFR). When this character (Xoff2) is detected, it will be placed in the FIFO along with normal
incoming RX data. The 698 compares each incoming receive character with Xoff-2 data. If a match exists, the
received data will be transferred to FIFO and ISR bit-4 will be set to indicate detection of special character.
Although the Internal Register Table shows Xon, Xoff Registers with 8 bits of character information, the actual
number of bits is dependent on the programmed word length. Line Control Register (LCR) bits 0-1 defines the
number of character bits, i.e., either 5 bits, 6 bits, 7 bits, or 8 bits. The word length selected by LCR bits 0-1
also determines the number of bits that will be used for the special character comparison. Bit-0 in the Xon, Xoff
Registers corresponds to the LSB bit for the receive character.
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