XRT86VL32_2 Datasheet, PDF (150/155 Pages) Exar Corporation – DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION

XRT86VL32
DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 124: LIU GLOBAL CONTROL REGISTER 1 (LIUGCR1)
REV. V1.2.0
HEX ADDRESS: 0X0FE1
BIT
FUNCTION
TYPE DEFAULT
DESCRIPTION-OPERATION
2
RXMUTE
R/W
0 Receive Output Mute:
This bit permits the user to configure the Receive T1 Block to auto-
matically pull its Recovered Data Output pins to GND anytime (and
for the duration that) the Receive T1 LIU Block declares the LOS
defect condition.
In other words, if this feature is enabled, the Receive T1 LIU Block
will automatically “mute” the Recovered data that is being routed to
the Receive T1 Framer block anytime (and for the duration that) the
Receive T1 LIU Block declares the LOS defect condition.
0 – Disables the “Muting upon LOS” feature.
1 – Enables the “Muting upon LOS” feature.
NOTE: The receive clock is not muted when this feature is enabled.
1
EXLOS
Extended LOS Enable:
This bit allows users to extend the number of zeros at the receive
input of each channel before RLOS is declared.
When Extended LOS is enabled, the Receive T1 LIU Block will
declare RLOS condition when it receives 4096 number of consecu-
tive zeros at the receive input.
When Extended LOS is disabled, the Receive T1 LIU Block will
declare RLOS condition when it receives 175 number of consecu-
tive zeros at the receive input.
0 = Disables the Extended LOS Feature.
1 = Enables the Extended LOS Feature.
0
ICT
R/W
0 In-Circuit-Testing Enable:
This bit allows users to tristate the output pins of all channels for in-
circuit testing purposes.
When In-Circuit-Testing is enabled, all output pins of the
XRT86VL32 are “Tri-stated”. When In-Circuit-Testing is disabled, all
output pins will resume to normal condition.
0 = Disables the In-Circuit-Testing Feature.
1 = Enables the In-Circuit-Testing Feature.
TABLE 125: LIU GLOBAL CONTROL REGISTER 2 (LIUGCR2)
HEX ADDRESS: 0X0FE2
BIT
FUNCTION
TYPE DEFAULT
DESCRIPTION-OPERATION
7
Force to "0"
R/W
0 Set to "0"
6
RxTCNTL
R/W
0 Receive Termination Select Control
This bit sets the LIU to control the RxTSEL function with either the
individual channel register bit or the global hardware pin.
0 = Control of the receive termination is set to the register bits
1 = Control of the receive termination is set to the hardware pin
5-0
Reserved
R/W
0 This Bit Is Not Used
145