XR16V2650 Datasheet, PDF (14/47 Pages) Exar Corporation – HIGH PERFORMANCE DUART WITH 32-BYTE FIFO

XR16V2650
PRELIMINARY
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
FIGURE 8. RECEIVER OPERATION IN NON-FIFO MODE
16X or 8X or 4X C lock
( D LD[5:4] )
R eceive D ata Shift
R e g iste r (R S R )
D ata Bit
V alidation
REV. P1.0.0
Re ce ive D ata C h aracters
R e ce ive
D ata B yte
and Errors
Error
Tags in
LSR bits
4:2
R ece ive D a ta
H old in g R eg iste r
(R H R )
R H R Interrupt (ISR bit-2)
RXFIFO 1
FIGURE 9. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE
16X or 8X or 4X Clock
( DLD[5:4] )
32 bytes by 11-bit
wide FIFO
Receive Data
Byte and Errors
Receive Data Shift
Register (RSR)
Receive
Data FIFO
Receive
Data
Data Bit
Validation
Receive Data Characters
Example
: - RX FIFO trigger level selected at 16 bytes
(See Note Below)
Data falls to
8
RTS# re-asserts when data falls below the flow
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
FIFO
Trigger=16
RHR Interrupt (ISR bit-2) programmed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
Data fills to
24
RTS# de-asserts when data fills above the flow
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
RXFIFO1
14