ST16C1450 Datasheet, PDF (14/32 Pages) Exar Corporation – 2.97V TO 5.5V UART

ST16C1450/51
2.97V TO 5.5V UART
áç
REV. 4.2.0
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TABLE 3: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1
ADDRESS REG READ/
A2-A0 NAME WRITE
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3 BIT-2 BIT-1 BIT-0 COMMENT
16C550 Compatible Registers
0 0 0 RHR RD Bit-7 Bit-6 Bit-5 Bit-4
Bit-3 Bit-2 Bit-1 Bit-0
0 0 0 THR WR Bit-7 Bit-6 Bit-5 Bit-4
Bit-3 Bit-2 Bit-1 Bit-0
0 0 1 IER RD/WR 0
0 1 0 ISR RD
0
0
Special
0
Mode
Enable
(Enable
MCR bits
7, 2)
0
0
0
Modem
Status
Int.
Enable
RX Line TX
Status Empty
Int.
Int.
Enable Enable
RX
Data
Int.
Enable
LCR[7] = 0
INT
INT INT INT
Source Source Source Source
Bit-3 Bit-2 Bit-1 Bit-0
011
LCR RD/WR Divisor Set TX Set
Enable Break _Parity
Even
Parity
Parity
Enable
Stop
Bits
Word Word
Length Length
Bit-1 Bit-0
1 0 0 MCR RD/WR 0/
0
Power
Down
Mode
0 Internal (OP2#)/ (OP1#)/ RTS# DTR#
Loop-
back
Enable
INT
Output
Enable
Output Output
SOFT _{Control Control}
Reset
1 0 1 LSR RD
0
THR & THR
RX
RX
RX
RX
RX
TSR
Empty
Empty
Break
Framing
Error
Parity
Error
Over-
run
Error
Data LCR[7] = 0
Ready
1 1 0 MSR RD
CD#
Input
RI#
Input
DSR#
Input
CTS#
Input
Delta
CD#
Delta Delta Delta
RI# DSR# CTS#
1 1 1 SPR RD/WR Bit-7 Bit-6 Bit-5 Bit-4
Bit-3 Bit-2 Bit-1 Bit-0
Baud Rate Generator Divisor
000
001
DLL RD/WR Bit-7
DLM RD/WR Bit-7
Bit-6
Bit-6
Bit-5
Bit-5
Bit-4
Bit-4
Bit-3
Bit-3
Bit-2
Bit-2
Bit-1
Bit-1
Bit-0
Bit-0
LCR[7] = 1
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