XRT83SH38_0609 Datasheet, PDF (13/78 Pages) Exar Corporation – 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT

REV. 1.0.7
MICROPROCESSOR INTERFACE
XRT83SH38
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
SIGNAL NAME
BGA
LEAD
#
TYPE
DESCRIPTION
HW/HOST
T10 I Mode Control Input
This pin is used to select Host mode or Hardware mode. By default, the LIU is set in
Hardware mode. To use Host mode, this pin must be pulled "Low".
NOTE: Internally pulled “High” with a 50kΩ resistor.
WR_R/W/EQC0 D7
I Write Input(R/W)/Equalizer Control Signal 0
Host Mode
This pin is used to communicate a Read or Write operation according to the which
microprocessor is chosen. See the Microprocessor Section of this datasheet for
details.
Hardware Mode
EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit
Line Build Out. See Table 22 for more details.
NOTE: Internally pulled “Low” with a 50kΩ resistor.
RD_DS/EQC1 C7
I Read Input (Data Strobe)/Equalizer Control Signal 1
Host Mode
This pin is used to communicate a Read or Write operation according to the which
microprocessor is chosen. See the Microprocessor Section of this datasheet for
details.
Hardware Mode
EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit
Line Build Out. See Table 22 for more details.
NOTE: Internally pulled “Low” with a 50kΩ resistor.
ALE/EQC2
A7
I Address Latch Input (Address Strobe)
Host Mode
This pin is used to latch the address contents into the internal registers within the LIU
device. See the Microprocessor Section of this datasheet for details.
Hardware Mode
EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit
Line Build Out. See Table 22 for more details.
NOTE: Internally pulled “Low” with a 50kΩ resistor.
CS/EQC3
B7
I Chip Select Input - Host mode:
Host Mode
This pin is used to initiate communication with the microprocessor interface. See the
Microprocessor Section of this datasheet for details.
Hardware Mode
EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit
Line Build Out. See Table 22 for more details.
NOTE: Internally pulled “Low” with a 50kΩ resistor.
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