XR76121ELMTR-F Datasheet, PDF (13/19 Pages) Exar Corporation – PowerBlox 20A Synchronous Step-Down COT Regulators

VIN × [tON – (2.5 × 10^-8)]
RON =
3.45 × 10^-10
Applications Inform_Va_Ot_Ui_Ton (Continued)
Overcurrent^tOP^Nro⁼te^VcItNio^xn^1.(⁰O⁶C^xP^{f x}) ^Eff.
If the load current exceeds the programmed overcurrent
threshold I_OCP for four consecutive switching cycles,
the regulator enters the hiccup mode of operation.
I(nhihccicucpuptimmeooduet)th. eFoMl_{1lOo.0wS6ViFOxnEUgf T}T_xtEhgfeaf.the_{–iscca[(u2}rep_.5tut_×imr1ne₀e_-od8)uoxtfVfa_INfo_{]sro1ft1-s0tmarst}
iTshaettreemgupltaetdoR.r_OIw_Nf _il=Ol _{rCePmapienrsinisht(}si_3c,.c4h_5uipc×cm₁u₀po_-1d0t_{)eimuenotuiltlowaidll}
repeat.
current
is reduced below the programmed I_OCP. In order to program
overcurrent protection use the following equation:
(IOCP + (0.5 × ∆IL))
RLIM =
ILIM
+ 0.16kΩ
RDS
Where:
■■ R_LIM is resistor value in kΩ for programming I_OCP
■■ I_OCP is the overcurrent value to be programmed
■■ ΔI_L is th_Re_{1 =}pe_Ra₂k_x-to-^Vp_0Oe_.U6aTk i_–nd₁uctor current ripple
■■ I_LIM/R_DS is the minimum value of the parameter
specified in the tabulated data
■■
■■
I0_{L.I1M6/RkΩDSCaSc=Sc1o=}4u_t.n_S5t_SusA_xfo/mr10ΩO0.6µ_CVAP
comparator
offset
The above equation is for worst-case analysis and
π ^{sfoarfeagugairvdesnaC}_Rg^Fa_L^Fi_Iⁿ_M^=s,t2_wpx^{rilel m}x_baR_et11^uhx^rei5_ghOx_ef^C_LrC^{Pt.hTanypitchaalt}
value of I_OCP,
predicted by
the above equation. Graph of calculated I_OCP vs. R_LIM is
compared to typical I_OCP in Figures 23.
S_If h_tho_ert-_oC_ui_tr_pc_uu_tit^f_v^LP_o^C_lr_t⁼o_agte_ec₂t_dxi_ro_πon_pxs(_√S¹_bLC_exP_loC)_{wOU6T0% of its programmed}
value (i.e., FB drops below 0.36V), the regulator will enter
hiccup mode. Hiccup mode will persist until short-circuit
is
of
resmofot-vsetadr.t._RT_FhH_Fe_{=icSc2uCxpPπ}
c₁ircuit becomes active at
m_{x f}o_xd_Ce_FFand short-circuit
the end
recovery
waveform is shown in Figure 16.
Over Temperature Protection (OTP)
OTP triggers at a nominal controller temperature of 138°C.
The gates of the switching FET and the synchronous FET
are turned off. When controller temperature cools down to
123°C, soft-start is initiated and regular operation resumes.
RON = ^{VIN × [tON – (2.5 × 10-8)]XR76121}
3.45 × 10^-10
Overvoltage Protection (OVP^VO)UT
TothnheeVvo_OouUlttTpaugotef OtahVtePVref^t_S^Oug_RNnNu_OcS⁼_lNatiot=opVnr_IiN.nVd_IOxe_Ntt1oV×e_.P0c_[a6t_tOsni_xsNa_{fOanx–cVE(}oh_2fPfvi_..e5evtr_{×ehvdro1e0}ltsb_-a_{8h)yg]oecldocmovnpodaltiartiiongnge}
set at 1.2 x V_REF. When VS3N.4S5 ×v1o0l^-t¹a⁰ ge exceeds the
OVP threshold, an internal overvoltage signal asserts after
1tTcuauhrpsneas(ctlyooitpwonirc-tsahuilde)n.etTliol hFwViEs-_RSsTOOiNd_NtV_OSer=ePNmFv=sEoai₁glTit_{V.nna0IsaNag6V}lneOxxlodaUf1_ndtVTx.ca_0rOh_Eo6(ltUs3ofep_fxT.o.4ss_{f5daox–bi×ssfE}fesc_[f1(tl_{feh2oh.0.rawe-5t1rs0)×gh1eiPg1.G10}ht_{-5-h8Os)eixOxdV}eDo_{IVNuF]RltoEpEwTuF..t,}
Then low-side FET turns off to prevent complete discharge
of V_OUT. The high-side and low-side FETs remain latched
off until V_IN or EN is recycled. In order to use this feature,
connect VSNS
the application
ctoRir_LcV_IMu^Oit=^U. ^TUw⁽s^IOeit^Ch₁t^Ph_.0^a+e_6VI^r(Ls^Ox0e_Ia^UM.fs5m^Txis×Eeto_f^∆_f^r_.r^Ie^{Lds)–)iivs[itd(}₊o^2e.r₀₅^r_.d_1×^ai₆vs^1ki_Ωd^0s-eh⁸⁾ro^xwvVanINlu^]ine
that was used for pRro_Og_Nra=mming_RV_DOSU(T3._{.45 × 10-10)}
Programming the Output Voltage
Use a voltage divider as shown in Figure 1 to program the
output voltage V_OUT.
R1R=LIRM2=x
(IVOOCUPT+
0.6
(0.5
I–_LI1M
RDS
×
∆IL))
+ 0.16kΩ
The recommended value for R2 is 2kΩ.
Programming th^Ce^SS^S o⁼ft^tS-S^St^xart^100.6µVA
Place a capacitor C_SS between the SS and AGND pins to
π ^{poforflolotgS}_wr^{Sai,nmgcatehlqceuuslaaottifeot-nsCt:thFRaF1ert==.reIR2nq2xuoxirrde}x^{edVRr0O11.tcU6o}x^{aT5ppar–}x^ocf1^g_L^it_C^raanmcea
soft-start time
C_SS from the
fLCCS=S
=2tSxS_πx
x
110µA
√^0L.6xVCOUT
P_XoFuir_Rge_t7up-B_6rue1ti_.a₂₁s_T15y.S_hpt_aia_csr_at_ltu_hpp_{eRreFc-FCabF=piFaas=2bixs2litπtaxyrxπ1ttufoxxpRsC1t}1_{wFaFxart5vuepxfofLirnCmtos}
a pre-charged
are shown in
M_Tha_exim_stu_em_adA_y-l_slo_taw_teabl_v^feL_oCV_lt⁼_ao_glt_ea₂g_xre_iπpR_pxi_lp_e√¹p_Ll_ae_xtCa_Ot_fUeF_TeB_dbP_ain_{ck pin FB}
(V_FB,_RIPPLE) must not exceed 50mV in order for the regulator
to function correctly. If V_FB,_RIPPLE is larger than 50mV then
π ^{kCeOeUpTtahnedV/oFrBL,RsIPhPoLuElRdbFFbeel=oiwn}2^c5x^re0amx^s1Vf^e.x^dC^a_F^s_F ^{necessary in order to}
REV1A
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