XR21V1410 Datasheet, PDF (12/23 Pages) Exar Corporation – 1-CH FULL-SPEED USB UART

XR21V1410
1-CH FULL-SPEED USB UART
REV. 1.0.0
3.0 REGISTER SET DESCRIPTION
The internal register set of the V1410 consists of 2 different types of registers: UART Manager and UART
registers. The UART Manager controls the TX, RX and FIFOs of all UART channels. The UART registers
configure and control the remaining UART channel functionality not related to the UART FIFO.
3.1 UART Manager Registers..
TABLE 5: UART MANAGER REGISTERS
ADDRESS
REGISTER NAME
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3
BIT-2
BIT-1
BIT-0
0X10 FIFO_ENABLE
0
0
0
0
0
0
RX
TX
0X18 RX_FIFO_RESET
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
0x1C TX_FIFO_RESET
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
FIFO_ENABLE Registers
Enables the RX FIFO and TX FIFOs. For proper functionality, the UART TX and RX must be enabled in the
following order:
FIFO_ENABLE = 0x1
// Enable TX FIFO
UART_ENABLE = 0x3
// Enable TX and RX
FIFO_ENABLE = 0x3
// Enable RX FIFO
RX_FIFO_RESET and TX_FIFO_RESET Registers
Writing a non-zero value to these registers resets the FIFOs.
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