XRP6142 Datasheet, PDF (11/17 Pages) Exar Corporation – Synchronous Step-Down Controller with DDR

XRP6142
Synchronous Step-Down Controller with DDR
Memory Termination
( ) _CIN
=
I _{OUT ,MAX} × V_OUT ×
fs × 0.02V_IN
V_IN − V_OUT
× V_IN ²
SYNCHRONOUS FET (LOW-SIDE FET)
Select the synchronous FET for voltage rating
BV_DSS, on resistance rating R_DS(ON) and gate
drive rating V_GS. As a rule of thumb, voltage
rating should be at least twice the converter
input voltage. FETs with voltage rating of up to
30V should provide satisfactory performance.
Drive voltage of 4.5V is sufficient for
applications with minimum input voltage of
4.5V. For applications with a lower input
voltage a FET with 2.5V gate drive should be
selected. Switching losses of the Synchronous
FET are negligible in comparison to its
conduction losses. R_DS(ON) is calculated based
on conduction losses from:
( ) ^{RDS (ON ) ≤}
P_Conduction
1 − D × I_OUT ²
It is common practice to allocate 50% of the
total FET losses to the synchronous FET. As an
example, consider a 10W buck converter with
a target efficiency of 90%. Therefore, the
target total power loss is 1.1W. Assume that
the only significant non-FET loss is the
inductor loss estimated at 0.1W. Thus the
maximum conduction loss of the synchronous
FET should not exceed 0.5W. By using this
value in the above equation R_DS(ON) can be
calculated and a suitable FET selected.
SWITCHING FET (HIGH-SIDE FET)
Select the switching FET for voltage rating
BV_DSS, on-resistance rating R_DS(ON), gate drive
rating V_GS, rise time t_r and fall time t_f. BV_DSS
and V_GS selection guidelines are the same as
Synchronous FET. The switching FET incurs
switching (i.e., transitional) as well as
conduction losses. R_DS(ON) is calculated based
on conduction losses from:
R_{DS (ON )}
≤
P_Conduction
D × I_OUT ²
It is common practice to allocate 50% of the
total high-side FET losses to conduction.
Proceeding with the example from previous
section the total target loss is 0.5W, and thus
target conduction loss equals 0.25W. By using
this value in the above equation R_DS(ON) can be
calculated. Rise and fall time can be
approximated from:
t_r
+ t_f
=
P_Switching
V_IN × I_out ×
f_s
Since the allotted switching loss budget is
0.25W, t_r and t_f can be calculated from the
above equation.
For a detailed explanation of FET losses and
FET selection procedure refer to EXAR
application note ANP-20.
R-C SNUBBER (OPTIONAL)
An R-C snubber placed across the synchronous
FET eliminates the ringing and reduces the
amplitude of overshoot at SW node. Use
surface-mount components and place them
close to the FET drain-source. Calculate the
value of snubber capacitor Csnb from:
Csnb = 3× Coss
Coss is the output capacitance of the
synchronous FET corresponding to V_IN.
Calculate the value of the snubber resistor
Rsnb from:
Rsnb = ^{2 ×VOUT}
I _OUT
DDR MEMORY POWER APPLICATIONS
XRP6142 can be used to generate the required
V_DDQ (V_DD) or V_TT Reference voltages for DDR I,
II and III memories and provides a 40mA
buffered V_TT Reference voltage. When used in
conjunction with Exar’s SP2996 DDR Memory
Termination, the XRP6142 provides a complete
DDR power management solution. A cost-
effective DDR2 solution is shown on page 15.
XRP6142 provides the VDDQ and VTTREF
voltages. SP2996 provides the VTT voltage.
Please note that the current output of VDDQ
can be increased up to 10A by using a larger
QT/QB MOSFET and scaling the L1 and C3
accordingly.
© 2010 Exar Corporation
Page 11 of 17
Rev. 1.0.0