SP6644 Datasheet, PDF (11/15 Pages) Sipex Corporation – Single/Dual Alkaline Cell, High Efficiency Step-Up DC-DC Converter

0.88V to
3.3V Input
22µH
0.7A
22µF
0.1µF
RLIM
VBATT
LX
SP6644
SP6645
VOUT
100pF*
SHDN
BATTLO
FB
GND
VOUT=
2V to 5.2V
47µF
R1
*optional compensation
R2
Figure 28. Adjustable Output Voltage Circuitry
With an external resistor tolerance of +1%, the
peak current tolerance will be +6%. To make
sure that the SP6644/6645 internal circuitry
adequately controls the inductor current, it is
recommended that values equal to or greater
than 22µH (+10%) be used.
The SP6644/6645 devices control algorithm
delivers an average maximum load current in
regulation as defined by:
I_LOAD-MAX
=
E
x I_PEAK x V_BATT
2 x V_OUT
where I_LOAD-MAX [A] is the maximum load current,
E is the efficiency factor (generally between 0.8
and 0.9), I [A] is the programmed peak
PEAK
inductor current, V [V] is the input voltage to
BATT
the device, and V [V] is the output voltage.
OUT
Given the minimum input voltage, output voltage,
and maximum average load current, the value of
I_PEAK can be solved for and an appropriate inductor
can be chosen. It is good design practice to use
the lowest peak current possible to
reduce possible EMI and output ripple voltage.
A closed-core inductor, such as a toroid or
shielded bobbin, will minimize any fringe
magnetic fields or EMI.
APPLICATION NOTES
Printed circuit board layout is a critical part of
design. Poor designs can result in excessive EMI
on the voltage gradients and feedback paths on
the ground planes with applications involving
high switching frequencies and large peak
currents. Excessive EMI can result in instability
or regulation errors.
All power components should be placed on the
PC board as closely as possible with the traces
kept short, direct, and wide (>50mils or 1.25mm).
Extra copper on the PC board should be integrated
into ground as a pseudo-ground plane. On a
multilayer PC board, route the star ground using
component-side copper fill, then connect it to the
internal ground plane using vias.
For the SP6644/6645 devices, the inductor and
input and output filter capacitors should
be soldered with their ground pins as close
together as possible in a star-ground
configuration. The V pin must be bypassed
OUT
directly to ground as close to the SP6644/6645
devices as possible (within 0.2in or 5mm). The
DC-DC converter and any digital circuitry should
be placed on the opposite corner of the PC board
as far away from sensitive RF and analog input
stages. The external voltage-feedback network
should be placed very close to the FB pin as well
as the R_LIM resistor (within 0.2in or 5mm). Any
Date: 11/30/04
SP6644/6645 High Efficiency Boost Regulator
11
© Copyright 2004 Sipex Corporation