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SP3223ECY-L-TR Datasheet, PDF (11/21 Pages) Exar Corporation – Intelligent +3.0V to +5.5V RS-232 Transceivers
The charge pump operates in a discontinu-
ous mode using an internal oscillator. If the
output voltages are less than a magnitude
of 5.5V, the charge pump is enabled. If the
output voltages exceed a magnitude of 5.5V,
the charge pump is disabled. This oscillator
controls the four phases of the voltage shift-
ing. A description of each phase follows.
Phase 1
— VSS charge storage — During this phase
of the clock cycle, the positive side of capaci-
tColr+sisCth1 eanndswCit2cahreed
initially charged
to GND and the
to VCC.
charge
in C1– is transferred to C2–. Since C2+ is con-
nected to VCC, the voltage potential across
capacitor C2 is now 2 times VCC.
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of
C2 to GND. This transfers a negative gener-
ated voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the volt-
age to C3, the positive side of capacitor C1
is switched to VCC and the negative side is
connected to GND.
Phase 3
— VDD charge storage — The third phase of
the clock is identical to the first phase — the
charge transferred in C1 produces –VCC in
the negative terminal of C1, which is applied
tCo2+thiseanteVgCaCt,ivtheesvidoeltaogfecappoatecnittoiarlCa2c.roSsisncCe2
is 2 times VCC.
Phase 4
— VDD transfer — The fourth phase of
the clock connects the negative terminal
of C2 to GND, and transfers this positive
generated voltage across C2 to C4, the
VDD storage capacitor. This voltage is
regulated to +5.5V. At this voltage, the in-
ternal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to VCC
and the negative side is switched to GND, al-
lowing the charge pump cycle to begin again.
The charge pump cycle will continue as long
as the operational conditions for the internal
oscillator are present.
Since both V+ and V– are separately gener-
ated from VCC, in a no–load condition V+
and V– will be symmetrical. Older charge
pump approaches that generate V– from
V+ will show a decrease in the magnitude
of V– compared to V+ due to the inherent
inefficiencies in the design.
The Exar charge pump is designed to
operate reliably with a range of low cost
capacitors. Either polarized or non polar-
ized capacitors may be used. If polarized
capacitors are used they should be oriented
as shown in the Typical Operating Circuit.
The V+ capacitor may be connected to either
ground or Vcc (polarity reversed.)
The charge pump operates with 0.1µF
capacitors for 3.3V operation. For other
supply voltages, see table 4 for required
capacitor values. Do not use values smaller
than those listed. Increasing the capacitor
values (e.g., by doubling in value) reduces
ripple on the transmitter outputs and may
slightly reduce power consumption. C2, C3,
and C4 can be increased without changing
C1’s value.
For best charge pump efficiency locate the
charge pump and bypass capacitors as
close as possible to the IC. Surface mount
capacitors are best for this purpose. Using
capacitors with lower equivalent series re-
sistance (ESR) and self-inductance, along
with minimizing parasitic PCB trace induc-
tance will optimize charge pump operation.
Designers are also advised to consider that
capacitor values may shift over time and
operating temperature.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7017 • www.exar.com
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SP3223E/EB/EU_101_062712