XR81112 Datasheet, PDF (10/12 Pages) Exar Corporation – Universal Clock - High Frequency LVCMOS/LVDS/LVPECL Clock Synthesizer

2.5V
LVDS
Output
2.5V
50:
100:
LVDS
Input
50:
Figure 9: XR81112 2.5V LVDS Output Termination
Output Signal Timing Definitions
The following diagrams clarify the common definitions of
the AC timing measurements.
Q
80%
20%
nQ
t_R
80%
V_SWING
20%
t_F
Figure 10: Output Rise/Fall Time and Swing
Q
nQ
t_PW
t_PERIOD
odc =
t_PW
t_PERIOD
x 100%
Figure 11: Output Period and Duty Cycle
© 2014 Exar Corporation
10 / 12
XR81112
exar.com/XR81112
Rev 1A