XR-2207 Datasheet, PDF (10/24 Pages) Exar Corporation – Voltage-Controlled Oscillator

XR-2207
Binary Keying Inputs (Pins 8 and 9)
The logic levels applied to the two binary keying inputs
allow the selection of four different oscillator frequencies.
The internal impedance at these pins is approximately
5kΩ. Keying voltages, which are referenced to pin 10, are
< 1.4 V for “zero” and > 3V for “one” logic levels. Table 1
relates binary keying input logic levels, and selected
timing pins to oscillator output frequency for each of the
four possible cases.
Figure 12 shows the oscillator control mechanism in
greater detail. Timing pins 4, 5, 6 and 7 correspond to the
emitters of switching transistor pairs T1, T2, T3, and T4
respectively, which are internal to the integrated circuit.
The current switches, and corresponding timing
terminals, are activated by external logic signals applied
to pins 8 and 9.
Logic Level
Pin 8 Pin 9
0
0
0
1
1
0
1
1
Selected
Timing Pins
6
6 and 7
5
4 and 5
Frequency
f₁
f₁ + Df₁
f₂
f₂ + Df₂
Table 1. Logic Table for Binary Keying Controls
Definitions:
f1
+
1
R3C
Df1
+
1
R4C
Df2
+
1
R2C
Df2
+
1
R1C
Logic Levels: 0 = Ground, 1  3V
Note
For single supply operation, logic levels
voltage at pin 10
are referenced to
Timing Capacitor
C
2
3
IT/2
IT/2
V_CC
1
Ib
T4
T3
T2
T1
10
A
8
Binary
Keying
Controls
B
45 67
V
9
I1 I2 I3 I4
R1 R2 R3 R4
12
V_EE
Figure 12. Simplified Schematic of Frequency
Control Mechanism
Squarewave Output (Pin 13)
The squarewave output at pin 13 is an “open-collector”
stage capable of sinking up to 20mA of load current. R_L
serves as a pull-up load resistor for this output.
Recommended values for R_L range from 1kΩ to 100kΩ.
Triangle Output (Pin 14)
The output at pin 14 is a triangle wave with a peak swing of
approximately one-half of the total supply voltage. Pin 14
has a 10Ω output impedance and is internally protected
against short circuits.
MODES OF OPERATION
Split Supply Operation
Figure 13 is the recommended configuration for split
supply operation. The circuit operates with supply
voltages ranging from $4V to $13V. Minimum drift
occurs with $6V supplies. For operation with unequal
supply voltages, see Figure 5.
With the generalized circuit of Figure 13A, the frequency
of operation is determined by the timing capacitor, C, and
the activated timing resistors (R₁ through R₄). The timing
resistors are activated by the logic signals at the binary
Rev. 2.02
10