SP2209E Datasheet, PDF (10/17 Pages) Sipex Corporation – High ESD Dual Port RS-232 Transceiver

Phase 1
— V_DD charge storage — S1 and S2 are
closed. S3 and S4 are open. During this
phase of the clock cycle, the positive side of
C₁ is connected to GND. The negative side
of capacitor C₂ is now 2 times V_CC.
Phase 2
— V_DD transfer — S1 and S2 are closed.
S3 and S4 are open. The negative side of
capacitor C₂ is connected to C₂-, The posi-
tive side of C₂ is connected to GND. This
transfers a negative generated voltage to
C₂. A negative voltage is built up on the
negative side of C₂ with each cycle of the
oscillator. If the current drawn is small, the
output voltage at C₂- will be close to -Vdd.
As the current drawn from C₂- increases, the
output voltage will decrease with magnitude.
The charge pump cycle will continue as long
as the operational conditions for the internal
oscillator present. Refer to Figure 8 for the
internal charge pump waveforms.
DESCRIPTION
Standby Circuitry
The SP2209E device incorporates power
saving, on board standby circuitry. The
standby current is typically less than
100µA. The SP2209E device automati-
cally enters a standby mode when the V_DD
power supply is removed. An internal com-
parator generates an internal shutdown
signal that disables the external oscillator
disengaging the charge pump. Refer to
Figure 9 for the internal standby detection
circuit.
The inverted output V- goes to ground.
All driver outputs are disabled. The inputs
for receivers 1 through 4 for both ports A
and B are at high impedance. Receiver 5
for both ports A and B remain fully active
as power management receiver lines to
system peripherals that may come online
during the standby mode.
Figure 8. Charge Pump Waveforms
Figure 9 Internal Standby Detection Circuit
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
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SP2209E_100_071612