XRT91L82 Datasheet, PDF (1/59 Pages) Exar Corporation – 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER

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PRELIMINARY
XRT91L82
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
APRIL 2005
GENERAL DESCRIPTION
The XRT91L82 is a fully integrated SONET/SDH
transceiver for OC-48/STM16 applications supporting
the use of Forward Error Correction (FEC) capability.
The transceiver includes an on-chip Clock Multiplier
Unit (CMU), which uses a high frequency Phase-
Locked Loop (PLL) to generate the high-speed
transmit serial clock from slower external clock
references. It also provides Clock and Data Recovery
(CDR) functions by synchronizing its on-chip Voltage
Controlled Oscillator (VCO) to the incoming serial
data stream. The chip provides serial-to-parallel and
parallel-to-serial converters and 16-bit Differential
LVDS/LVPECL, or Single-Ended LVPECL system
interfaces in both receive and transmit directions.
The transmit section includes a 16x9 Elastic Buffer
(FIFO) to absorb any phase differences between the
transmitter clock input and the internally generated
transmitter reference clock. In the event of an
overflow, an internal FIFO control circuit outputs an
OVERFLOW indication. The FIFO under the control
REV. P1.0.5
of the FIFO_AUTORST register bit can automatically
recover from an overflow condition. The operation of
the device can be monitored by checking the status
of the LOCKDET_CMU and LOCKDET_CDR output
signals. An on-chip phase/frequency detector and
charge-pump offers the ability to form a de-jittering
PLL with an external VCXO that can be used in loop
timing mode to clean up the recovered clock in the
receive section.
APPLICATIONS
• SONET/SDH-based Transmission Systems
• Add/Drop Multiplexers
• Cross Connect Equipment
• ATM and Multi-Service Switches, Routers and
Switch/Routers
• DSLAMS
• SONET/SDH Test Equipment
• DWDM Termination Equipment
FIGURE 1. BLOCK DIAGRAM OF XRT91L82
OVERFLOW
FIFO_RST
TXDI[15:0]P/N
16
TXPCLKIP/N
TXPCLKOP/N
TXCLKO16P/N
TXCLKO16SEL
STS-48 TRANSCEIVER
WP
RP
RLOOPP
Div by
16
PISO
(Parallel Input
Serial Output)
Re-Timer
CMU
DLOOP RLOOPS
RXDO[15:0]P/N
RXPCLKOP/N
DISRD
DISRDCLK
TDO
TDI
TCK
TMS
TRST
SIPO
(Serial Input
Parallel Output)
16
Div by
16
JTAG
Serial
Microprocessor
Hardware
Control
CDR
TXOP/N
TXSCLKOP/N
RXIP/N
PFD
& Charge Pump
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • [phone] • FAX [phone] • www.exar.com