XRT91L81 Datasheet, PDF (1/40 Pages) Exar Corporation – 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER

PRELIMINARY
XRT91L81
JANUARY 2004
2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
REV. P1.0.3
GENERAL DESCRIPTION
The XRT91L81 is a fully integrated SONET/SDH
transceiver block for applications in SONET OC-48
allowing the use of Forward Error Correction (FEC)
capability. The transceiver includes an on-chip Clock
Multiplier Unit (CMU), which uses a high frequency
Phase-Locked Loop (PLL) to generate the high-
speed transmit serial clock from slower external clock
references. It also provides Clock and Data Recovery
(CDR) functions by synchronizing its on-chip Voltage
Controlled Oscillator (VCO) to the incoming serial
data stream. The chip provides serial-to-parallel and
parallel-to-serial converters and 4-bit LVDS system
interfaces in both receive and transmit directions.
The transmit section includes a 4x9 Elastic Buffer
(FIFO) to absorb any phase differences between the
transmitter input clock and the internally generated
transmitter reference clock. In the event of an
overflow, an internal FIFO control circuit outputs an
OVERFLOW indication. The FIFO under the control
of the AUTORST pin can automatically recover from
an overflow condition. The operation of the device
can be monitored by checking the status of the
LOCKDET and LOSDET output signals. An on-chip
phase/frequency detector and charge-pump offers
the ability to form a de-jittering PLL with an external
VCXO that can be used in loop timing mode to clean
up the recovered clock in the receive section.
APPLICATIONS
• SONET/SDH-based Transmission Systems
• Add/Drop Multiplexers
• Cross Connect Equipment
• ATM and Multi-Service Switches, Routers and
Switch/Routers
• DSLAMS
• SONET/SDH Test Equipment
• DWDM Termination Equipment
• Optical Modules and Sub-Systems
FIGURE 1. BLOCK DIAGRAM OF THE XRT91L81
OC-48 TRANSCEIVER
FIFO_RST
FIFO_AUTORST
TxDI0P/N
TxDI1P/N
TxDI2P/N
TxDI3P/N
TxCLKIP/N
TXPCLKOP/N
TXCLKO16P/N
TRITXCLKO16
WP
RP
RLOOPP
PISO
(Parallel Input
Serial Output)
Re-Timer
0
1
CMU
DLOOP RLOOPS
RxDO0P/N
RxDO1P/N
RxDO2P/N
RxDO3P/N
RxCLKP/N
RXCLK16P/N
DISRD
SIPO
(Serial Input
Parallel Output)
0
CDR
1
Serial
Microprocessor
Hardware
Control
PFD
& Charge Pump
TXOP/N
TXO2P/N
TXO2DIS
TXO2SEL
RXI0P/N
RXI1P/N
RXSEL
TRIRXD
REXT
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • [phone] • FAX [phone] • www.exar.com