XRT86VX38_0906 Datasheet, PDF (1/53 Pages) Exar Corporation – OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION

XRT86VX38
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
JUNE 2009
REV. 1.0.1
GENERAL DESCRIPTION
The XRT86VX38 is an eight-channel 1.544 Mbit/s or
2.048 Mbit/s DS1/E1/J1 framer and Long-haul/Short-
hual LIU integrated solution featuring R³ technology
(Relayless, Reconfigurable, Redundancy) and BITS
Timing element. The physical interface is optimized
with internal impedance, and with the patented pad
structure, the XRT86VX38 provides protection from
power failures and hot swapping.
The XRT86VX38 contains an integrated DS1/E1/J1
framer and LIU which provide DS1/E1/J1 framing and
error accumulation in accordance with ANSI/ITU_T
specifications. Each framer has its own framing
synchronizer and transmit-receive slip buffers. The
slip buffers can be independently enabled or disabled
as required and can be configured to frame to the
common DS1/E1/J1 signal formats.
Each Framer block contains its own Transmit and
Receive T1/E1/J1 Framing function. There are 3
Transmit HDLC controllers per channel which
encapsulate contents of the Transmit HDLC buffers
into LAPD Message frames. There are 3 Receive
HDLC controllers per channel which extract the
payload content of Receive LAPD Message frames
from the incoming T1/E1/J1 data stream and write the
contents into the Receive HDLC buffers. Each framer
also contains a Transmit and Overhead Data Input
port, which permits Data Link Terminal Equipment
direct access to the outbound T1/E1/J1 frames.
Likewise, a Receive Overhead output data port
permits Data Link Terminal Equipment direct access
to the Data Link bits of the inbound T1/E1/J1 frames.
The XRT86VX38 fully meets all of the latest T1/E1/J1
specifications: ANSI T1/E1.107-1988, ANSI T1/
E1.403-1995, ANSI T1/E1.231-1993, ANSI T1/
E1.408-1990, AT&T TR 62411 (12-90) TR54016, and
ITU G-703, G.704, G706 and G.733, AT&T Pub.
43801, and ETS 300 011, 300 233, JT G.703, JT
G.704, JT G706, I.431. Extensive test and diagnostic
functions include Loop-backs, Boundary scan,
Pseudo Random bit sequence (PRBS) test pattern
generation, Performance Monitor, Bit Error Rate
(BER) meter, forced error insertion, and LAPD
unchannelized data payload processing according to
ITU-T standard Q.921.
Applications and Features (next page)
FIGURE 1. XRT86VX38 8-CHANNEL DS1 (T1/E1/J1) FRAMER/LIU COMBO
Local PCM
Highway
XRT86VX38
1 of 8-channels
Tx Serial
Clock
Tx Serial
Data In
Rx Serial
Clock
Rx Serial
Data Out
PRBS
Generator &
Analyser
External Data
Link Controller
Tx Overhead In
Rx Overhead Out
2-Frame
Slip Buffer
Elastic Store
Tx Framer
2-Frame
Slip Buffer
Elastic Store
Rx Framer
Performance
Monitor
HDLC/LAPD
Controllers
Tx LIU
Interface
LLB LB
Rx LIU
Interface
LIU &
Loopback
Control
TTIP
TRING
RTIP
RRING
8kHz sync
OSC
Back Plane
1.544-16.384 Mbit/s
Signaling &
Alarms
System (Terminal) Side
TxON
JTAG
DMA
Interface
Microprocessor
Interface
INT
Memory
D[7:0]
A[14:0]
3
P
Select
4
WR
ALE_AS
RD
RDY_DTACK
Intel/Motorola µP
Configuration , Control &
Status Monitor
1:2 Turns Ratio
1:1 Turns Ratio
RxLOS
Line Side
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • [phone] • FAX [phone] • www.exar.com