XRT56L85 Datasheet, PDF (1/12 Pages) Exar Corporation – Low Power PCM Line Interface

FEATURES
D Low Power (Typical 14mA)
D Single +5V Supply
D Up to 2.048 Mbps Operation in Both TX and RX
Directions
D Receiver Input can be:
Balanced Transformer Coupled
Capacitively (Twisted Pair)
Single Coaxial Capacitive Coupling
XRT56L85
Low Power
PCM Line Interface
APPLICATIONS
D T1 and CEPT Interfaces
D CPI
D DMI
October 2000-1
GENERAL DESCRIPTION
The XRT56L85 is a PCM line interface chip. It consists of
both transmit and receive circuitry in a DIL 18 pin
package. The maximum bit rate the chip can handle is
2.048 Mbps and the signal level to the received can be
attenuated by 10dB of cable loss at half the bit rate. Total
current consumption is between 12-16mA at +5V.
ORDERING INFORMATION
Part No.
XRT56L85P
XRT56L85D
Package
18 Lead 300 Mil PDIP
18 Lead 300 Mil JEDEC SOIC
Operating
Temperature Range
-40°C to +85°C
-40°C to +85°C
BLOCK DIAGRAM
RXDATA+ 2
RXDATA- 3
RXV_CC 9
RXGND 7
TXV_CC 18
TPOS 17
TCLK 16
TNEG 12
TXGND 14
Peak
Detector
Bias
PDC
1
Positive
Threshold
Comparator
+
−
Negative
Threshold
Comparator
−
+
Bias
TTL Buffer
11 RPOS
TTL Buffer
8 RCLK
TTL Buffer ^{4 TE}
10 RNEG
6 TANK BIAS
TTL Buffer
TTL Buffer
5 BIAS
15 TXDATA+
13 TXDATA-
Figure 1. Block Diagram
Rev. 2.11
E2000
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z [phone] z FAX [phone]
1