DAN-139 Datasheet, PDF (1/5 Pages) Exar Corporation – EXAR’S XR16L580 COMPARED

DATA COMMUNICATIONS APPLICATION NOTE
DAN139
November 2003
EXAR’S XR16L580 COMPARED WITH INDUSTRY STANDARD 16550 UART
Author: PY
1.0 INTRODUCTION
This application note describes the major differences between Exar’s XR16L580 and the industry standard
16550 UART (referred to as “16550” in this document). This application note is applicable to the 48-TQFP
package only. These devices are very similar, with a few minor hardware, bus timing and firmware-related dif-
ferences. In most applications, the XR16L580IM will fit and operate in a TL16C550CPT or TL16C550CPFB
socket.
1.1 HARDWARE DIFFERENCES (48-TQFP)
• The XR16L580 and 16550 are both available in the 48-pin TQFP package. Additionally, the 16550 can also
be found in the 40-pin PDIP and 44-pin PLCC packages. The XR16L580 is not available in those packages
but is available in the 32-pin QFN package. In the 48-pin TQFP package, the XR16L580 is pin-to-pin com-
patible with the industry standard 16550, but some legacy signals are not available (“No Connects”) in the
XR16L580 (see Table 1). These legacy signals are typically not used in most applications, hence they are
likely not needed.
• The XR16L580 has two new pins, 16/68# pin to select Intel or Motorola bus and PwrSave pin to reduce I_sleep
(sleep current) to less than 30 uA in sleep mode. The Power-Save feature is perfect for battery operated
designs. These two pins are ‘No Connects’ in the 16550. Since the 16/68# pin has an internal pull-up resis-
tor and the PwrSave pin has an internal pull-down resistor in the XR16L580, these pins can be left open
when installing the XR16L580 into any 16550 socket. The pads on the PCB for these two pins should have
no connection.
• The 32-pin QFN package of the XR16L580 is a new package and should be considered for new designs
only. It is the industry’s smallest package UART.
• For most cases, the XR16L580 will work with the oscillator circuitry for any industry standard 16550 UART.
When using an external clock input for frequencies greater than 24 MHz, the XR16L580 will require a 2K
pull-up resistor on the XTAL2 pin. For applications using crystal clock frequencies in the range 1.8432-
14.7456 MHz, there is virtually no difference in the set up.
1.2 BUS TIMING DIFFERENCES
1.2.1 Chip Select (-CS) and Read (-IOR) / Write (-IOW) Timing
Some of the 16550 UARTs require that the -CS pin be asserted first before the -IOR or -IOW pin and the -IOR
or -IOW pin must be de-asserted before the -CS pin is de-asserted. During a read, the Exar UARTs can have
either the -CS or the -IOR signal asserted first and have either signal be de-asserted first. The signals are
wire-ORed in the XR16L580, therefore the second signal asserted will initiate the read cycle and the first signal
de-asserted terminates the read cycle. The same is true during a write for -CS and -IOW. The flexibility of the
XR16L580 timing can be important in DSP, ARM, and MIPS designs. Also, because of this flexibility, the
XR16L580 will work with the timing used for the 16550.
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