FLK057XV Datasheet, PDF (1/4 Pages) Eudyna Devices Inc – GaAs FET & HEMT Chips

FEATURES
• High Output Power: P1dB = 27.0dBm(Typ.)
• High Gain: G1dB = 7.0dB(Typ.)
• High PAE: η_add = 32%(Typ.)
• Proven Reliability
DESCRIPTION
The FLK057XV chip is a power GaAs FET that is designed for
general purpose applications in the Ku-Band frequency range as
it provides superior power, gain, and efficiency.
FLK057XV
GaAs FET & HEMT Chips
Drain
Drain
Source
Source
Source
Gate
Gate
Fujitsu’s stringent Quality Assurance Program assures the highest
reliability and consistent performance.
ABSOLUTE MAXIMUM RATING (Ambient Temperature Ta=25°C)
Item
Symbol
Condition
Drain-Source Voltage
Gate-Source Voltage
Total Power Dissipation
Storage Temperature
Channel Temperature
VDS
VGS
Ptot
Tstg
Tch
Tc = 25°C
Fujitsu recommends the following conditions for the reliable operation of GaAs FETs:
1. The drain-source operating voltage (VDS) should not exceed 10 volts.
2. The forward and reverse gate currents should not exceed 4.4 and -0.2 mA respectively with
gate resistance of 1000Ω.
3. The operating channel temperature (Tch) should not exceed 145°C.
Rating
15
-5
3.75
-65 to +175
175
ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25°C)
Item
Symbol
Test Conditions
Min.
Saturated Drain Current
Transconductance
IDSS VDS = 5V, VGS = 0V
-
gm VDS = 5V, IDS = 125mA
-
Pinch-off Voltage
Vp VDS = 5V, IDS = 10mA -1.0
Gate Source Breakdown Voltage VGSO _{IGS = -10µA}
-5
Output Power at 1dB
Gain Compression Point
P1dB
26
VDS = 10V
Power Gain at 1dB
Gain Compression Point
G1dB
IDS ≈ 0.6IDSS
f = 14.5GHz
6
Limit
Typ. Max.
200 300
100 ^-
-2.0 -3.5
-
-
27 -
7
-
Power-added Efficiency
η_add
-
32
-
Thermal Resistance
Rth Channel to Case
-
Note: RF parameter sample size 10pcs. criteria (accept/reject)=(2/3)
The chip must be enclosed in a hermetically sealed environment for optimum performance and reliability.
20 40
Unit
V
V
W
°C
°C
Unit
mA
mS
V
V
dBm
dB
%
°C/W
Edition 1.3
July 1999
1