EM636165_06 Datasheet, PDF (63/75 Pages) Etron Technology, Inc. – 1Mega x 16 Synchronous DRAM (SDRAM)

EtronTech
1M x 16 SDRAM
EM636165
Figure 18.3. Full Page Read Cycle (Burst Length=Full Page, CAS# Latency=3)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CL K
tCK3
CKE ^High
CS#
RAS#
CAS#
WE #
A11
A10
RAx
A0~A9
RAx
DQ M
DQ ^Hi-Z
Activate
Command
Bank A
RBx
CAx
RBx
CBx
RBy
RBy
tRP
Ax ^Ax+1 Ax+2 Ax-2 Ax-1 Ax Ax+1 Bx Bx+1 Bx+2 Bx+3 Bx+4 Bx+5
Read
Command
Bank A
Activate
Command
Bank B
Read
Command
Bank B
Full Page burst operation does not
terminate when the burst length is
satisfied; the burst counter
Precharge
Command
Bank B
The burst counter wraps _{increments and continues}
from the highest order
bursting beginning with the
page address back to zero _{starting address.}
during this time interval
Burst Stop
Command
Activate
Command
Bank B
Preliminary
63
Rev. 2.7 Mar. 2006