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EM6A9160TSA-5G Datasheet, PDF (52/63 Pages) Etron Technology, Inc. – 8M x 16 DDR Synchronous DRAM (SDRAM)
EtronTech
EM6A9160TSA
Figure 33. Initialize and Mode Register Sets
VDD
VDDQ
VTT
(system*)
VREF
CK
CK
tVDT>=0
tCK
tCH tCL
tIS tIH
CKE
COMMAND
tIS tIH
NOP
PRE
EMRS
MRS
PRE
AR
AR
MRS
ACT
DM
A0-A9,
A11
tIS tIH
CODE
CODE
CODE
RA
A10
BA0,BA1
ALL BANKS tIS tIH
CODE
tIS tIH
tIS tIH
BA0=H
BA1=L
CODE
BA0=L
BA1=L
ALL BANKS
tIS tIH
CODE
RA
BA0=L
BA
BA1=L
DQS
High-Z
DQ
High-Z
T=200µs
Power-up:
VDD and
CLK stable
**tMRD
**tMRD
tRP
tRFC
Extended mode
Register set
200 cycles of CK**
Load Mode
Register,
Reset DLL (with A8=H)
tRFC
**tMRD
Load Mode
Register,
(with A8=L)
*=VTT is not applied directly to the device, however tVTD must be greater than or equal to zero to avoid device latch-up
**=tMRD is required before any command can be applied, and 200 cycles of CK are required before any executable command can be applied
The two Auto Refresh commands may be moved to follow the first MRS but precede the second PRECHARGE ALL command
Don’t Care
Etron Confidential
52
Rev. 1.1
Feb. 2009