EM6A8160TSA Datasheet, PDF (45/51 Pages) Etron Technology, Inc. – 4M x 16 DDR Synchronous DRAM (SDRAM)

EtronTech
EM6A8160TSA
Figure 38. Read with Auto Precharge
CK
CK
CKE
COMMAND
A0-A7
t_CK
t_CH t_CL
t_IS t_IH
t_IS t_IH
NOP
READ
t_IS t_IH
Col n
NOP
NOP
NOP
t_IH
VALID
VALID
VALID
NOP
ACT
NOP
NOP
NOP
RA
A8,A9,A11
RA
A10
BA0,BA1
EN AP
tIS tIH
t_IS t_IH
Bank X
CL=3
RA
Bank X
tRP
DM
Case 1:
tAC/tDQSCK=min
DQS
DQ
Case 2:
tAC/tDQSCK=max
DQS
t_LZ
min
t_RPRE
t_DQSCK
min
t_RPST
DO
n
t_LZ
min
t_RPRE
t_AC
min
t_DQSCK
max
t_RPST
t_LZ
max
DO
t_mHaZx
DQ
n
m^tLa^Zx
t_AC
max
DO n = Data Out from column n
Burst Length = 4 in the case shown
3 subsequent elements of Data Out are provided in the programmed order following DO n
EN AP = Enable Autoprecharge
ACT = ACTIVE, RA = Row Address
NOP commands are shown for ease of illustration; other commands may be valid at these times
The READ command may not be issued until tRAP has been satisfied. If Fast Autoprecharge is supported, tRAP = tRCD, else the READ
may not be issued prior to tRASmin (BL*tCK/2)
Don’t Care
Etron Confidential
45
Rev 1.2
Apr. 2009