EM6AB160TSA Datasheet, PDF (43/61 Pages) Etron Technology, Inc. – 32M x 16 bit DDR Synchronous DRAM (SDRAM)

EtronTech
EM6AB160TSA
Figure 23. Write to Read Max tDQSS, ODD Number of Data, Interrupting
CK
CK
COMMAND
ADDRESS
DQS
DQ
DM
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12
WRITE
NOP
Bank
Col n
tDQSS (max)
NOP
NOP
tWTR
DI
n
READ
Bank
Col o
NOP
NOP
CL=3
DI n = Data In for column n
An interrupted burst of 8 is shown, 3 data elements are written
tWTR is referenced from the first positive CK edge after the last Data In Pair (not the last desired
Data In element)
A10 is LOW with the WRITE command (AUTO PRECHARGE is disabled)
The READ and WRITE commands are to the same devices but not necessarily to the same bank
DM= UDM & LDM
Don’t Care
Etron Confidential
43
Rev.1.3 May 2009