EM68C16CWQG-18IH Datasheet, PDF (40/60 Pages) Etron Technology, Inc. – 64M x 16 bit DDRII Synchronous DRAM (SDRAM)

EtronTech
EM68C16CWQG
Figure 18. Posted CAS# operation: AL=2
Read followed by a write to the same bank
-1
CK#
CK
CMD
DQS
DQS#
DQ
0
1
2
Active
A-Bank
Read
A-Bank
AL=2
>=t_RCD
3
4
5
6
7
8
CL=3
Write
A-Bank
WL=RL-1=4
RL=AL+CL=5
Dout 0 Dout 1 Dout 2 Dout 3
9
10
11
12
Din 0 Din 1 Din 2 Din 3
[ AL=2 and CL=3, RL= (AL+CL)=5, WL= (RL-1)=4, BL=4]
Figure 19. Posted CAS# operation: AL=0
Read followed by a write to the same bank
-1
CK#
CK
CMD
DQS
DQS#
DQ
0
1
2
3
4
5
Active
A-Bank
>=t_RCD
AL=0
Read
A-Bank
CL=3
RL=AL+CL=3
6
7
8
9
10
11
12
Write
A-Bank _WL=RL-1=2
Dout 0 Dout 1 Dout 2 Dout 3
Din 0 Din 1 Din 2 Din 3
[ AL=0 and CL=3, RL= (AL+CL)=3, WL= (RL-1)=2, BL=4]
Rev. 1.2
40
Apr. /2016