EM566168 Datasheet, PDF (2/12 Pages) Etron Technology, Inc. – 1M x 16 Pseudo SRAM

Et r onT ec h
Block Diagram
VCC
VSS
A0 – A19
DQ0 – DQ7
DQ8 – DQ15
Refresh Control
Refresh
Counter
Address
Buffer
Row
Address
Decoder
Input
Data
Control
Standby/Deep Power
Down Mode Control
Memory Cell Array
1M x 16
Sense AMP
Column Decoder
Address Buffer
EM566168
Output
Data
Control
CS1#
CS2
OE#
WE#
LB#
UB#
Control
Logic
Preliminary
2
Rev 0.2
Feb. 2002