EM6A9160TSA Datasheet, PDF (1/51 Pages) Etron Technology, Inc. – 8M x 16 DDR Synchronous DRAM (SDRAM)

EtronTech
EM6A9160TSA
Etron Confidential
8M x 16 DDR Synchronous DRAM (SDRAM)
Advanced (Rev. 1.1 Aug. /2009)
Features
• ^{Fast clock rate: 250MHz}
• ^{Differential Clock CK &} CK ^input
• ^{Bi-directional DQS}
• ^{DLL enable/disable by EMRS}
• ^{Fully synchronous operation}
• ^{Internal pipeline architecture}
• ^{Four internal banks, 2M x 16-bit for each bank}
• ^{Programmable Mode and Extended Mode registers}
- CAS Latency: 3
- Burst length: 2, 4, 8
- Burst Type: Sequential & Interleaved
• ^{Individual byte write mask control}
• ^{DM Write Latency = 0}
• ^{Auto Refresh and Self Refresh}
• ^{4096 refresh cycles / 64ms}
• ^{Precharge & active power down}
• ^{Power supplies: V}DD & ^VDDQ ^{= 2.5V ± 5%}
• ^{Interface: SSTL_2 I/O Interface}
• ^{Package: 66 Pin TSOP II, 0.65mm pin pitch}
- Pb and Halogen Free
Overview
The EM6A9160 SDRAM is a high-speed CMOS
double data rate synchronous DRAM containing 128
Mbits. It is internally configured as a quad 2M x 16
DRAM with a synchronous interface (all signals are
registered on the positive edge of the clock signal, CK).
Data outputs occur at both rising edges of CK
and _CK .Read and write accesses to the SDRAM are
burst oriented; accesses start at a selected location
and continue for a programmed number of locations in
a programmed sequence. Accesses begin with the
registration of a BankActivate command which is then
followed by a Read or Write command. The EM6A9160
provides programmable Read or Write burst lengths of
2, 4, or 8. An auto precharge function may be enabled
to provide a self-timed row precharge that is initiated at
the end of the burst sequence. The refresh functions,
either Auto or Self Refresh are easy to use. In addition,
EM6A9160 features programmable DLL option. By
having a programmable mode register and extended
mode register, the system can choose the most
suitable modes to maximize its performance. These
devices are well suited for applications requiring high
memory bandwidth and high performance.
Table 1.Ordering Information
Part Number
Clock
Frequency
Data Rate
Package
EM6A9160TSA-4G ^{250MHz 500Mbps/pin TSOPII}
TS: indicates TSOP II package
A: indicates Generation Code
G: indicates Pb and Halogen Free for TSOPII Package
Figure 1. Pin Assignment (Top View)
VDD
1
DQ0
2
VDDQ
3
DQ1
4
DQ2
5
VSSQ
6
DQ3
7
DQ4
8
VDDQ
9
DQ5
10
DQ6
11
VSSQ
12
DQ7
13
NC
14
VDDQ
15
LDQS
16
NC
17
VDD
18
NC
19
LDM
20
WE
21
CAS
22
RAS
23
CS
24
NC
25
BA0
26
BA1
27
A10/AP
28
A0
29
A1
30
A2
31
A3
32
VDD 33
66
VSS
65
DQ15
64
VSSQ
63
DQ14
62
DQ13
61
VDDQ
60
DQ12
59
DQ11
58
VSSQ
57
DQ10
56
DQ9
55
VDDQ
54
DQ8
53
NC
52
VSSQ
51
UDQS
50
NC
49
VREF
48
VSS
47
UDM
46
CK
45
CK
44
CKE
43
NC
42
NC
41
A11
40
A9
39
A8
38
A7
37
A6
36
A5
35
A4
34
VSS
Etron Technology, Inc.
No. 6, Technology Rd. V, Hsinchu Science Park, Hsinchu, Taiwan 30078, R.O.C.
TEL: [phone] FAX: [phone]
Etron Technology, Inc. reserves the right to change products or specification without notice.